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E2D0017-27-42 Semiconductor
Semiconductor
This version: Jan.Family MSM6650 1998 Previous version: May. 1997
MSM6652/53/54/55/56-xxx, MSM6652A/53A/ 54A/55A/56A/58A-xxx, MSM66P54-xx, MSM66P56-XX (Under development), MSM6650
Internal Mask ROM Voice Synthesis IC, Internal One-Time-Programmable (OTP) ROM Voice Synthesis IC, External ROM Drive Voice Synthesis IC
GENERAL DESCRIPTION
The MSM6650 family is the successor to OKI's MSM6375 family. To ensure high-quality voice synthesis, the MSM6650 family members offer adaptive differential pulse-code modulation (ADPCM) playback, pulse-code modulation (PCM) playback, 12-bit D/A conversion, and on-chip -40 dB/ octave low-pass filter (LPF). The conventional "beep" tones and 2-channel playback are now easier to use. OKI has added additional functions such as melody play, fade-out, and random playback. OKI has improved external control by adding an Edit ROM. The Edit ROM can be used to form sentences by linking phrases. The MSM6650 family members can support a variety of applications as it can function in either Standalone Mode or Microcontroller Interface Mode. In Microcontroller Interface Mode, serial input control is available. Serial input control minimizes the number of microcontroller port pins required for voice synthesis control. The MSM6650 family includes an internal mask ROM version, internal one-time-programmable (OTP) ROM version, and external ROM version. The features of the MSM6650 family devices are as follows. * MSM6652/53/54/55/56-xxx These devices are single-chip voice synthesizers with an on-chip mask ROM using the CMOS technology. Standalone Mode or Microcontroller Interface Mode can be selected by mask option. * MSM6652A/53A/54A/55A/56A/58A-xxx The trial production period for these devices is shorter than those described above. These devices are suitable for developing prototype models and concept demonstration of new products. * MSM66P54-xx, MSM66P56-XX The device is a single-chip CMOS voice synthesizer with one-time-programmable (OTP) ROM. Standalone and Microcontroller Interface Modes are selected by using a code (01-04). The user can easily write voice data using the development tool AR761 or AR762, or P54 adapter. Unlike the mask ROM version, the OTP version is suited to applications which requires a small lot production of different type devices or short delivery time. * MSM6650 The MSM6650 device can directly connect external ROM or EPROM of up to 64 Mbits, which stores voice data. This device is ideally suited to an evaluation IC for the MSM6650 family because its circuit configuration is identical to those of the mask ROM-based and OTP version devices.
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Semiconductor
MSM6650 Family
CONTENTS
Standalone Mode 5 7 10 13 18 18 19 21 23 1. PLAYBACK CODE SPECIFICATION ............................................................................................................. 23 2. INTERNAL ROM USAGE AND DISABLED AREA ..................................................................................... 23 3. PULL-UP/PULL-DOWN RESISTOR ............................................................................................................... 23 4. OPTION(S) ............................................................................................................................................................ 24 5. STANDALONE MODE ...................................................................................................................................... 24 6. SAMPLING FREQUENCY ................................................................................................................................. 30 7. VOICE PLAYBACK TIME ................................................................................................................................. 31 8. CHANNEL STATUS ........................................................................................................................................... 31 9. PLAYBACK METHOD ....................................................................................................................................... 31 10. STANDBY CONVERSION ................................................................................................................................. 34 11. VOICE OUTPUT .................................................................................................................................................. 34 12. LOW-PASS FILTER POP NOISE ...................................................................................................................... 36 13. RC OSCILLATION .............................................................................................................................................. 37 14. CERAMIC OSCILLATION ................................................................................................................................ 41 15. POWER SUPPLY ................................................................................................................................................. 42 APPLICATION CIRCUITS .............................................................................................................. 43 FEATURES ......................................................................................................................................... BLOCK DIAGRAMS ......................................................................................................................... PIN CONFIGURATION ................................................................................................................. PIN DESCRIPTIONS ...................................................................................................................... ABSOLUTE MAXIMUM RATINGS ............................................................................................... RECOMMENDED OPERATING CONDITIONS ........................................................................ ELECTRICAL CHARACTERISTICS .............................................................................................. TIMING DIAGRAMS ....................................................................................................................... FUNCTIONAL DESCRIPTION ......................................................................................................
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Semiconductor Microcontroller Interface Mode
MSM6650 Family
FEATURES ......................................................................................................................................... BLOCK DIAGRAMS ......................................................................................................................... PIN CONFIGURATION ................................................................................................................... PIN DESCRIPTIONS ........................................................................................................................ ABSOLUTE MAXIMUM RATINGS ............................................................................................... RECOMMENDED OPERATING CONDITIONS ........................................................................ ELECTRICAL CHARACTERISTICS .............................................................................................. TIMING DIAGRAMS ....................................................................................................................... FUNCTIONAL DESCRIPTION ......................................................................................................
47 49 52 55 61 61 62 64 70 1. PLAYBACK CODE SPECIFICATION ............................................................................................................. 70 2. INTERNAL ROM USAGE AND DISABLED AREA ..................................................................................... 70 3. PULL-UP/PULL-DOWN RESISTOR ............................................................................................................... 71 4. OPTIONS ............................................................................................................................................................... 71 5. MICROCONTROLLER INTERFACE MODE ................................................................................................. 74 6. COMMAND DATA ............................................................................................................................................ 78 7. ADDRESS DATA ................................................................................................................................................. 86 8. STOP CODE .......................................................................................................................................................... 87 9. SAMPLING FREQUENCY ................................................................................................................................. 89 10. VOICE PLAYBACK TIME ................................................................................................................................. 89 11. CHANNEL STATUS ........................................................................................................................................... 90 12. PLAYBACK METHOD ....................................................................................................................................... 90 13. STANDBY CONVERSION ................................................................................................................................. 93 14. VOICE OUTPUT .................................................................................................................................................. 93 15. LOW-PASS FILTER POP NOISE ...................................................................................................................... 95 16. CERAMIC OSCILLATION ................................................................................................................................ 96 17. POWER SUPPLY ................................................................................................................................................. 97 18. EXTERNAL ROM DRIVING TIMING ............................................................................................................. 98 APPLICATION CIRCUITS ............................................................................................................ 100
Edit ROM EDIT ROM ........................................................................................................................................ ECHO PLAYBACK OF A SINGLE PHRASE .............................................................................. ECHO PLAYBACK OF MULTIPLE PHRASES .......................................................................... ECHO PLAYBACK OF A SINGLE PHRASE WITHIN A PHRASE STRING ....................... 104 113 116 117
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MSM6650 Family
The table below shows the major differences between the MSM6650 family and the MSM6375 family.
MSM6650 Family Interface Voice synthesis method "Beep" tone frequecy (length) Sampling frequency (fSAM) Standalone mode/Microcontroller interface mode
4-bit ADPCM or 8-bit PCM/Melody PCM
MSM6375 Family SW input/CPU input interface 4-bit ADPCM 1.0 or 2.0 kHz, (User-specified length, fixed at either 64, 128, 250, or 500 ms) Three frequencies at two oscillator frequencies (4.0, 6.4, 8.0 kHz with fOSC=64 kHz; 16.0, 25.6, 32.0 kHz with fOSC=256 kHz) 40 kHz to 256 kHz -24 dB/octave
fCUT fSAM 1.5 4.0 3.0 3.0 6.4 8.0
0.5, 1.0, 1.3, 2.0 kHz Options (16 ms to 2100 ms) Eight frequencies (4.0, 5.3, 6.4, 8.0, 10.6, 12.8, 16.0, or 32.0 kHz)
Master clock frequency (fOSC) 256 kHz (RC)/4.096 MHz (ceramic/crystal) LPF attenuation factor LPF cut-off frequency (fCUT), kHz Maximum phrase number Pull-up/pull-down resistors Standby conversion time Mask options
fCUT fSAM 1.8 4.0
-40 dB/octave
2.6 2.6 3.2 4.2 5.1 6.4 12.8 5.3 6.4 8.0 10.6 12.8 16.0 32.0
127 Built in 0.2 sec 4 options Edit ROM Fade-out Random playback Melody playback PCM playback Serial input/port output
111 -- 3 sec 14 options
Added function in edit ROM
--
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MSM6650 Family
STANDALONE MODE
FEATURES
Device name MSM6652, 6652A MSM6653, 6653A MSM6654, 6654A MSM6655, 6655A MSM6656, 6656A MSM6658A MSM66P54 MSM66P56 MSM6650 ROM size 288 Kbits 544 Kbits 1 Mbit 1.5 Mbits 2 Mbits 4 Mbits 1 Mbit 2 Mbit 64 Mbits (Max) Maximum playback time (sec) fSAM=4.0 kHz fSAM=6.4 kHz 16.9 31.2 63.8 96.5 129.1 259.7 63.8 129.1 4194.3 10.5 19.5 39.9 60.3 80.7 162.9 39.9 80.7 2620.5 fSAM=8.0 kHz 8.4 15.6 31.9 48.2 64.5 129.8 31.9 64.5 2096.4 fSAM=16 kHz 4.2 7.8 15.9 24.1 32.2 64.9 15.9 32.2 1048.2
Note: Actual voice ROM area is smaller by 22 Kbits. * 4-bit ADPCM or 8-bit PCM sound generation * Melody function * Edit ROM function * Two-channel mixing function * Built-in random playback function * Fade-out function via four-step sound volume attenuation * Built-in beep tone of 0.5 kHz, 1.0 kHz, 1.3 kHz, or 2.0 kHz selectable with a specific code * Sampling frequency of 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, or 32.0 kHz (32 kHz sampling is not possible when using RC oscillation) * Up to 120 phrases * Built-in 12-bit D/A converter * Built-in -40 dB/octave low-pass filter * Standby function * Selectable RC or ceramic oscillation * Package options: 18-pin plastic DIP (DIP18-P-300-2.54) (Product name: MSM6652-xxxRS/MSM6653-xxxRS/ MSM6654-xxxRS/MSM6655-xxxRS/ MSM6656-xxxRS/MSM6652A-xxxRS/ MSM6653A-xxxRS/MSM6654A-xxxRS/ MSM6655A-xxxRS/MSM6656A-xxxRS/ MSM6658A-xxxRS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name: MSM6652-xxxGS-K/MSM6653-xxxGS-K MSM6654-xxxGS-K/MSM6655-xxxGS-K/ MSM6656-xxxGS-K/MSM6652A-xxxGS-K/ MSM6653A-xxxGS-K/MSM6654A-xxxGS-K/ MSM6655A-xxxGS-K/MSM6656A-xxxGS-K/ MSM6658A-xxxGS-K/MSM66P54-03GS-K/ MSM66P54-04GS-K/MSM66P56-03GS-K/ MSM66P56-04GS-K) 20-pin plastic DIP (DIP20-P-300-2.54-W1) (Product name: MSM66P54-03RS/MSM66P54-04RS/ MSM66P56-03RS/MSM66P56-04RS) 64-pin plastic QFP (QFP64-P-1420-1.00-BK) (Product name: MSM6650GS-BK) 64-pin plastic SDIP (SDIP64-P-750-1.78) (Product name: MSM6650SS) 5/124
Semiconductor * Option Table
Pin Name
MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A
MSM6650 Family
Microcontroller Interface Mode Serial Input
Standalone Mode No Standby
*1
Parallel Input With Standby Mask Option
-- -- CPU SERIAL STBY -01 "H" "H" -- -02 "H" "L" --
MSM66P54/P56 MSM6650
-03 "L" "L" "L"
-04 "L" "L" "H"
*2
*1. The options for the mask ROM-based devices are mask options. The user should send OKI an option list before starting development. A sample of option list is shown below. *2. A code of OTP version device corresponds to one of the options. The user should specify either MSM66P54-03 or MSM66P54-04 or MSM66P56-03 or MSM66P56-04. (In this case, no option list is required.)
Oki Electric Industry Co., Ltd. Date:
Option List
You are requested to develop MSM665X-XXX on the following conditions. 1. Options There are four options for the MSM6650 family. Choose and circle the desired option. Option Option A Option B Option C Option D Interface mode Microcontroller Microcontroller Standalone Standalone Input Serial Parallel -- -- Standby conversion -- -- Yes No
2. Package and quantity Item Package (circle the desired one) 18-pin DIP (ceramic) 18-pin DIP (plastic) 18-pin DIP (plastic) 24-pin SOP (ceramic) 24-pin SOP (plastic) 24-pin SOP (plastic) Quantity Note Up to 10 samples. Operating temp. : 10 to 30C Up to 50 samples
Ceramic sample Mold sample
chip
pcs
chip
pcs
Mass production
chip
pcs per lot monthly Signed by Title : Company name :
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MSM6652/53/54/55/56-xxx MSM6652A/53A/54A/55A/56A/58A-xxx
BLOCK DIAGRAMS
A2 A1 A0 SW3 SW2 SW1 SW0 TEST
Address & Switching Controller
7
16-Bit (MSM6652/52A) 17-Bit (MSM6653/53A) 17-Bit (MSM6654/54A) 18-Bit (MSM6655/55A) 18-Bit (MSM6656/56A) 19-Bit (MSM6658A) Multiplexer
(MSM6652/52A) (MSM6653/53A) (MSM6654/54A) (MSM6655/55A) (MSM6656/56A) (MSM6658A) ROM (Containing 22-Kbit edit ROM & Address ROM)
288-Kbit 544-Kbit 1-Mbit 1.5-Mbit 2-Mbit 4-Mbit
8
RND
Random Circuit
BUSY
I/O Interface
16-Bit (MSM6652/52A) 17-Bit (MSM6653/53A) 17-Bit (MSM6654/54A) 18-Bit (MSM6655/55A) 18-Bit (MSM6656/56A) 19-Bit (MSM6658A) Address Counter
DATA Controller
ADPCM Synthesizer
PCM Synthesizer 12 Melody Generator 12-Bit DAC
OSC1 OSC2 OSC3
OSC Ceramic/ Crystal/RC
Timing Controller
BEEP Tone Generator
LPF
MSM6650 Family
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XT/CR
RESET
VDD
GND
AOUT
Semiconductor
MSM66P54/P56-xx
VPP
PGM
Program Circuit A2 A1 A0 SW3 SW2 SW1 SW0
Address & Switching Controller
7
17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-XX) Multiplexer
1-Mbit OTP ROM (MSM66P54-xx) 2-Mbit OTP ROM (MSM66P56-XX) (Containing 22-Kbit edit ROM & Address ROM)
8
TEST ADPCM Synthesizer RND Random Circuit
17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-XX) Address Counter
DATA Controller PCM Synthesizer 12 12-Bit DAC
BUSY
I/O Interface
Melody Generator OSC1 OSC2 OSC3 OSC (Ceramic/ Crystal/RC) Timing Controller BEEP Tone Generator
MSM6650 Family
LPF
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XT/CR
RESET
VDD
GND
AOUT
Semiconductor
MSM6650
RA22
RA0
D7
D0
A2 A1 A0 SW3 SW2 SW1 SW0 TEST1, 3
8-Bit LATCH Address & Switching Controller 7 23-Bit Multiplexer 8
RND
Random Circuit 23-Bit Address Counter
DATA Controller
ADPCM Synthesizer
CE RCS BUSY NAR IBUSY STANDBY
PCM Synthesizer 12 Melody Generator 12-Bit DAC
I/O Interface
XT/OSC1 XT/OSC2 OSC3
OSC (Ceramic/ Crystal/RC)
Timing Controller
BEEP Tone Generator
LPF
MSM6650 Family
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XT/CR
RESET CPU STBY TEST2 DVDD DGND
AGND AVDD AOUT
Semiconductor
MSM6650 Family
PIN CONFIGURATION (TOP VIEW)
The MSM66P54-xx and MSM66P56-XX has two more pins than the MSM6652-6658A while their pin configurations are identical. The additional two pins (VPP, PGM) of the MSM66P54-xx/P56-xx may be open at playback after completion of writing.
MSM6652-6658A (Mask ROM)
A0 A1 A2 TEST RESET 1 2 3 4 5 6 7 8 9 18 SW3 17 SW2 16 SW1 15 SW0 14 RND
MSM66P54/P56 (OTP)
VPP A0 A1 A2 TEST 1 2 3 4 5 6 7 8 9 20 PGM 19 SW3 18 SW2 17 SW1 16 SW0 15 RND 14 OSC3 13 OSC2 12 OSC1 11 VDD

BUSY 13 OSC3 12 OSC2 11 OSC1 10 VDD RESET XT/CR AOUT BUSY XT/CR AOUT GND
18-Pin Plastic DIP
GND 10
20-Pin Plastic DIP
MSM6652-xxxRS, MSM6653-xxxRS, MSM6654-xxxRS, MSM66P54-03/-04RS MSM6655-xxxRS, MSM6656-xxxRS, MSM6652A-xxxRS, MSM66P56-03/-04RS MSM6653A-xxxRS, MSM6654A-xxxRS, MSM6655A-xxxRS, MSM6656A-xxxRS, MSM6658A-xxxRS
MSM6652-6658A (Mask ROM) MSM66P54/P56 (OTP)
24 23 22 21 20 19 18 17 16 15 14 13 GND AOUT XT/CR NC BUSY NC VPP RESET TEST A2 A1 A0
VDD
1 2 3 4 5 6 7 8 9
24 23 22 21 20 19 18 17 16 15 14 13
GND
VDD
1 2 3 4 5 6 7 8 9
OSC1 OSC2 NC
AOUT
OSC1 OSC2 NC
XT/CR NC
OSC3 NC NC
BUSY NC NC
OSC3 NC
PGM
RND SW0 SW1 SW2 SW3
RESET TEST A2 A1 A0
RND SW0 SW1 SW2 SW3
10 11 12
10 11 12
24-Pin Plastic SOP
24-Pin Plastic SOP
MSM6652-xxxGS-K, MSM6653-xxxGS-K, MSM6654-xxxGS-K, MSM6655-xxxGS-K, MSM6656-xxxGS-K, MSM6652A-xxxGS-K, MSM6653A-xxxGS-K, MSM6654A-xxxGS-K, MSM6655A-xxxGS-K, MSM6656A-xxxGS-K, MSM6658A-xxxGS-K
MSM66P54-03/-04GS-K MSM66P56-03/-04GS-K
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Product name: MSM6650GS-BK
NC NC BUSY NAR AOUT AGND DGND AVDD DVDD XT/OSC1 XT/OSC2 OSC3 TEST1 RND XT/CR CPU TEST2 IBUSY NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
STANDBY SW0 SW1 SW2 SW3 A0 A1 A2 TEST3 RESET CE RCS D0
,
64 63 62 61 60 59 58 57 20 21 22 23 24 25 26 27
MSM6650 Family
56
55
54
53
52
STBY RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 RA11
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
RA10 RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 D7 D6 D5 D4 D3 D2 D1 NC
28
29
30
31
NC : No connection 64-Pin Plastic QFP
32
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MSM6650 Family
XT/OSC2 OSC3 TEST1 RND XT/CR CPU TEST2 IBUSY NC STANDBY SW0 SW1 SW2 SW3 A0 A1 A2 TEST3 RESET CE RCS D0 NC D1 D2 D3 D4 D5 D6 D7 RA0 RA1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
XT/OSC1 DVDD AVDD DGND AGND AOUT NAR BUSY NC STBY RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 RA11 RA10 NC RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2
NC : No connection 64-Pin Plastic SDIP
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MSM6650 Family
PIN DESCRIPTIONS
1. MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx 18-Pin plastic DIP
Pin Symbol Type Description Reset. Setting this pin to "L" puts the deveice in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. The MSM6650 family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. Sound Output. This is the synthesized output pin of the internal low-pass filter. Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. Oscillator 2. This pin is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an internal pull-up resistor. Phrase Inputs. These pins are phrase input pins corresponding to playback. If the input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. Ground. Power supply. Insert a 0.1mF or more bypass capacitor between this pin and GND. Test Mode. Set to "H" level. This pin has an internal pull-up resistor.
5
RESET
I
6 7 8 11
BUSY XT/CR AOUT OSC1
O I O I
12
OSC2
O
13
OSC3
O
14
RND
I
15-18
SW0-SW3
I
1-3 9 10 4
A0-A2 GND VDD TEST
I -- -- I
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Semiconductor 2.MSM66P54-xx, MSM66P56-XX 20-Pin plastic DIP
Pin Symbol Type
MSM6650 Family
6
RESET
I
Description Reset. Setting this pin to "L" puts the deveice in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. The MSM6650 family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. Sound Output. This is the synthesized output pin of the internal low-pass filter. Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. Oscillator 2. This pin is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an internal pull-up resistor. Phrase Inputs. These pins are phrase input pins corresponding to playback. If the input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. Ground. Power supply. Insert a 0.1mF or more bypass capacitor between this pin and GND. Test Mode. Set to "H" level. This pin has an internal pull-up resistor. Power supply used when writing data to internal OTP ROM. Leave open or set to "H" level during playback. Interface with voice analysis edit tool AR761 or AR762. Set to "L" level or leave open during playback.
7 8 9 12
BUSY XT/CR AOUT OSC1
O I O I
13
OSC2
O
14
OSC3
O
15
RND
I
16-19
SW0-SW3
I
2-4 10 11 5 1 20
A0-A2 GND VDD TEST VPP PGM
I -- -- I -- I
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Semiconductor
MSM6650 Family
3.MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54-xx, MSM66P56-XX 24-Pin plastic SOP
Pin Symbol Type Description Reset. Setting this pin to "L" puts the deveice in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. The MSM6650 family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. Sound Output. This is the synthesized output pin of the internal low-pass filter. Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. Oscillator 2. This pin is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an internal pull-up resistor. Phrase Inputs. These pins are phrase input pins corresponding to playback. If the input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used. Ground. Power supply. Insert a 0.1mF or more bypass capacitor between this pin and GND. Test Mode. Set to "H" level. This pin has an internal pull-up resistor. Power supply used when writing data to internal OTP ROM. Leave open or set to "H" level during playback. Interface with voice analysis edit tool AR761 or AR762. Set to "L" level or leave open during playback.
17
RESET
I
20 22 23 2
BUSY XT/CR AOUT OSC1
O I O I
3
OSC2
O
5
OSC3
O
8
RND
I
9-12
SW0-SW3
I
13-15 24 1 16 18 7
A0-A2 GND VDD TEST VPP* PGM*
I -- -- I -- I
* Pins for MSM66P54/56-xx only
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Semiconductor 4.MSM6650 64-Pin plastic QFP (64-Pin plastic SDIP)
Pin Symbol Type
MSM6650 Family
29(19)
RESET
I
Description Reset. Setting this pin to "L" puts the deveice in standby status. At this time, oscillation stops, AOUT is pulled to GND, and the deveice is initialized. The MSM6650 family devices have an internal power-on reset. To operate the power-on reset correctly, power should ramp up within 1 ms. If this is not possible, apply a RESET pulse when power is turned on. This pin has an internal pull-up resistor. Busy. This pin outputs a "L" level during playback. At power-on, this pin is at "H" level. XT/CR selectable pin. Set to "H" level when using ceramic oscillation. Set to "L" level when using RC oscillation. Sound Output. This is the synthesized output pin of the internal low-pass filter. Oscillator 1. This pin is a ceramic oscillator connection pin when using ceramic oscillation. This pin is an RC connection pin when using RC oscillation. When using an external clock, use this pin as the clock input. Oscillator 2. This pin is a ceramic oscillator connection pin when using a ceramic oscillator. This is an RC connection pin when using RC oscillation. Leave open if using an external clock. OSC2 outputs a "L" level in standby status. Oscillator 3. Leave open if using a ceramic oscillator. This pin is the RC connection pin when using RC oscillation. When RC oscillation is selected, OSC3 outputs a "H" level in standby status. Random Playback. Random playback starts when the RND pin is set to a "L" level. At the fall of RND, addresses from the random address playback circuit inside the IC are fetched. Set to a "H" level if random playback is not used. This pin has an internal pull-up resistor. Phrase Inputs. These pins are phrase input pins corresponding to playback. If the input changes, SW0 to SW3 pins capture address data after 16 ms and speech playback commences. These pins have internal pull-down resistors. Phrase Inputs. Phrase input pins correspoding to playback. The A0 input becomes invalid when the random playback function is used.
3(57) 15(5) 5 (59) 10(64)
BUSY XT/CR AOUT XT/OSC1
O I O I
11(1)
XT/OSC2
O
12(2)
OSC3
O
14(4)
RND
I
21-24 (11-14) 25-27 (15-17)
SW0-SW3
I
A0-A2
I
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Semiconductor
MSM6650 Family
Pin 6 (60) 7 (61) 8 (62) 9 (63) 16 (6) 13, 28 (3, 18) 17 (7) 18 (8) 20 (10) 30 (20)
Symbol Type AGND DGND AVDD DVDD CPU TEST1, 3 TEST2 IBUSY STANDBY CE -- -- -- -- I I I O O O Analog ground pin. Digital ground pin.
Description
Analog power pin. Insert a 0.1 mF or more bypass capacitor in between this pin and AGND. Digiral power pin. Insert a 0.1 mF or more bypass capacitor in between this pin and DGND. CPU Mode. Set to "L" level to select Standalone Mode. Set to "H" level to select Microcontroller Interface Mode. Test. Set these pins to "H" level. The TEST1 and TEST3 pins have internal pull-up resistor. Test. Set this pin to "L" level. I Busy. Outputs a "L" level during voice playback (except during standby conversion time), or when the AOUT pin is at half VDD level. Standby Indicator. This output pin remains at "L" level during oscillation. Chip Enable. CE is a timing output pin to control read of external memory. This pin outputs when RCS is at the "L" level. This pin goes high impedance when RCS is at the "H" level. Read Chip Select. The data bits D0-D7 are internally pulled down when RCS
31 (21) 32, 34-40 (22, 24-30) 41-63 (31-40, 42-54)
RCS
I
is high. Addresses and CE are output when RCS is at "L" level. The RA22-RA0 address pins and CE pin become high impedance. External Memory Data Bus. Data is input when RCS is low. When RCS is high, these pins become low due to internal pull-down resistors. External Memory Address. These are address pins for an external memory output when RCS is low. These pins become high impedance status if RCS is in "H" level. Standby Contorl. If set to "L" level, the MSM6650 enters standby mode 0.2
D0-D7
I
RA0-RA22
O
64 (55)
STBY
I
seconds after voice ends. If set to "H" level, the MSM6650 AOUT output maintains half VDD after voice ends.
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Semiconductor
MSM6650 Family
ABSOLUTE MAXIMUM RATINGS
(GND=0 V) Parameter Power supply voltage Input voltage Storage temperature Symbol VDD VIN TSTG -- Condition Ta = 25C Rating -0.3 to +7.0 -0.3 to VDD+0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
(GND=0 V) Parameter Power supply voltage Operating temperature Master clock frequency 1 Master clock frequency 2 Symbol VDD VDD Top fOSC1 fOSC2 Condition MSM6652-56, MSM6650, MSM6652A-56A MSM6658A, MSM66P54/P56 -- When crystal selected When RC selected (*) Min. 3.5 200 Range 2.4 to 5.5 3.5 to 5.5 -40 to +85 Typ. 4.096 256 Max. 4.5 300 Unit V V C MHz kHz
*
If RC oscillation is selected, 32kHz sampling frequency cannot be selected.
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Semiconductor
MSM6650 Family
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current 1 "H" input current 2 "L" input current 1 "L" input current 2 (note) Operating power consumption Standby power consumption Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistance VIL=GND Internal pull-up resistance -- Ta=-40C to +50C Ta=50C to 85C (VDD=5.0 V, GND=0 V, Ta=-40 to +85C) Min. Typ. Max. Unit -- 4.2 -- V -- 4.6 -- -- 30 -10 -200 -- -- -- -- -- -- -- 90 -- -90 6 -- -- 0.8 -- 0.4 10 200 -- -30 10 10 30 V V V mA mA mA mA mA mA mA
Analog Characteristics
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C) Parameter D/A output relative accuracy D/A output impedance LPF driving resistance LPF output impedance Harmonic wave distortion Symbol |VDAE| RDAO RAOUT RLPF dH Condition When D/A output is selected When D/A output is selected When LPF output is selected IF=100 mA 2.0VPP sine wave at 1kHz input waveform, fs=8kHz, Harmonic wave distortion= 2nd-21st harmonic wave component Signal component+2nd-21st harmonic wave component Noise during silence ns No load, input waveform mute -- 5 20 mV Min. -- 15 50 -- -- Typ. -- 25 -- 1 2.0 Max. 40 35 -- 3 4.0 Unit mV kW kW kW %
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Semiconductor DC Characteristics
MSM6650 Family
(VDD=3.1 V, GND=0 V, Ta=-40 to +85C) Parameter "H" input voltage "L" input voltage "H" output voltage "L" output voltage "H" input current 1 "H" input current 2 "L" input current 1 "L" input current 2 Operating power consumiption Standby power consumption LPF driving resistance LPF output impedance Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS RAOUT RLPF Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistance VIL=GND Internal pull-up resistance -- Ta=-40C to +50C Ta=50C to 85C When LPF output is selected IF=100 mA Min. 2.7 -- 2.6 -- -- 10 -10 -100 -- -- -- 50 -- Typ. -- -- -- -- -- 30 -- -30 4 -- -- -- 1 Max. -- 0.5 -- 0.4 10 100 -- -10 7 5 20 -- 3 Unit V V V V mA mA mA mA mA mA mA kW kW
AC Characteristics
Parameter Master clock duty cycle RESET input pulse width RESET input time after power-on RND input pulse width SW0-SW3 input pulse width BUSY output time 1 BUSY output time 2 Chattering prevention time D/A converter change time LPF stable time Standby transition time Random address capture time Symbol fduty tw(RST)
(VDD=2.4 to 5.5 V, GND=0 V, Ta=-40 to +85C) (VDD=3.5 to 5.5 V, GND=0 V, Ta=-40 to +85C) (Note) Condition Min. Typ. Max. Unit 40 50 -- 60 % -- 10 0 100 16 -- 130 14 60 6 0.15 16 -- -- -- -- -- 150 15 64 8 0.2 32 -- -- -- -- 10 170 16 68 10 0.25 48 ms ms ms ms ms ms ms ms ms sec ms
-- tD(RST) tw(RAN) See Functional Description 5.2 tw(SW) tSBS tBN tCHA tDAR,tDAF tL tSTB tRA -- -- At fSAM=8 kHz -- -- -- --
See Functional Description 5.2
Note: Applied to MSM6658A-xxx and MSM66P54-xx, MSM66P56-XX.
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Semiconductor
MSM6650 Family
TIMING DIAGRAMS
Power-On Timing
VDD RESET ( I ) BUSY (O)
tD(RST) tw(RST)
Activation of Standby State Timing when IC is activated
tW(SW) Address Data Capture SW0 (I) BUSY (O) tSBS IBUSY (O) * STANBY (O) * AOUT (O) tL tDAR tSTB tDAF Standby Status D/A Converter Change Time tCHA
Oscillation Startup Standby Status
*
IBUSY, STANDBY timings are applied to MSM6650 alone.
Repeated Playback Timing
SW0 (I) BUSY (O) AOUT (O) Oscillation Startup Single-phrase Playback Single-phrase Repeated Playback tBN
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Semiconductor Playback Timing during Transition of SW0-SW3
A2 - A0 (I) SW3 - SW2 (I) "L" SW1 (I) SW0 (I) BUSY (O) AOUT (O) Oscillation Startup First Phrase Play tCHA
MSM6650 Family
Second Phrase Play
First Phrase Playback Stops
Repeated Random Playback Timing
RND (I) BUSY (O) AOUT (O) Oscillation Startup First Phrase Play Same Phrase Repeated Play
Random Address Capture Timing
RND (I) BUSY (O) AOUT (O) tRA Voice Output Oscillation Startup tw(RAN) Random Address Fixed Time
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Semiconductor
MSM6650 Family
FUNCTIONAL DESCRIPTION
1. PLAYBACK CODE SPECIFICATION The user can specify a maximum of 120 phrases. Table 1.1 shows the settings by A2-A0 and SW3SW0. Table 1.1 User Specified Phrase List
A2-A0 000 111 SW3-SW0 0000 0001 1111 Code Description Inhibit code User Specified Phrases (120 phrases)
2. INTERNAL ROM USAGE AND DISABLED AREA (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx) The last 3 bytes of the internal ROM are not to be used as shown in Table 2.1. Please do not use these 3 bytes when creating the sound ROM. Table 2.1 shows the addresses that are not to be used for each model. Table 2.1 Internal ROM Layout and Disabled Area
Type MSM6652, 6652A MSM6653, 6653A MSM6654, 6654A MSM6655, 6655A MSM6656, 6656A MSM6658A MSM66P54 MSM66P56 Voice Data Area 00B00-08FFC 00B00-10FFC 00B00-1FFFC 00B00-2FFFC 00B00-3FFFC 00B00-7FFFC 00B00-1FFFC 00B00-3FFFC Disabled Area 08FFD, 08FFE, 08FFF 10FFD, 10FFE, 10FFF 1FFFD, 1FFFE, 1FFFF 2FFFD, 2FFFE, 2FFFF 3FFFD, 3FFFE, 3FFFF 7FFFD, 7FFFE, 7FFFF 1FFFD, 1FFFE, 1FFFF 3FFFD, 3FFFE, 3FFFF
Note: Addresses are in hex. 3. PULL-UP/PULL-DOWN RESISTOR The RESET, RND and TEST pins have internal pull-up resistors and the SW3-SW0 pins have internal pull-down resistors. Table 3.1 Pins with Pull-up/Pull-down Resistor
Pins with pull-up MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 MSM6650 RESET, RND, TEST RESET, RND, TEST RESET, RND, TEST1, 3 Pins with pull-down SW3-SW0 SW3-SW0 SW3-SW0
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Semiconductor 4. OPTION(S)
MSM6650 Family
In standalone mode the XT/CR pin can be used to select the oscillation circuit. If this pin is set to "H" level, the circuit is in ceramic oscillation, conversely, if set to "L" level, the circuit is in RC oscillation. In the case of RC oscillation, however, a 32 kHz sampling frequency cannot be used. An option to move to standby mode can be selected when rewriting ROM data. 5. STANDALONE MODE In standalone mode, the SW input interface function and the random playback function can be used. 5.1 SW Input Interface With the SW input interface, voice synthesis starts when SW3-SW0 pins have changed. To prevent chattering, the address is captured 16 ms (tCHA) after SW3-SW0 pins have changed. Voice synthesis does not start if A2-A0 pins have changed. Set the RND pin to "H" level if the random playback function is not used. At power on, SW3-SW0 pins are all "L" level. The SW input interface is effective when operating the MSM665X using a push-button switch. Speech synthesis starts when an address is changed by pressing the push-button switch. If the pushbutton switch is released during playback, then playback stops after the current phrase is completed.
A2 - A0 (I) SW3 - SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) Oscillation Startup Figure 5.1 SW Input Interface - Playback Timing
Figure 5.1 shows playback timing. SW3-SW0 pins have chattering prevention circuits. The pulse period at each pin requires 16ms (TCHA) or more. If a push-button switch is continuously pushed, the same phrase is played repeatedly. Figure 5.2 shows repeated playback timing. Figure 5.3 shows timing when A2-A0 are changed during playback.
tw(SW) tCHA
tCHA
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Semiconductor
MSM6650 Family
A2 - A0 (I) SW3 - SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) 1st Phrase Playback Oscillation Startup 1st Phrase Continuous Playback
Figure 5.2 SW Input Interface - Repeated Playback Timing
A2 - A0 (I) SW3 - SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) 1st Phrase Playback Oscillation Startup 2nd Phrase Playback
Figure 5.3 SW Input Interface Playback Timing If SW3-SW0 pins change during playback, then playback stops and the next phrase is played. For the next phrase playback, the voice is first stopped and playback occurs after 16 ms of chattering prevention. Figure 5.4 shows timing when SW3-SW0 are changed during playback.
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Semiconductor
MSM6650 Family
A2 - A0 (I) SW3 - SW2 (I) "L" SW1 (I) SW0 (I) BUSY (O) AOUT (O) Oscillation Startup 1st Phrase Playback tCHA 2nd Phrase Playback
1st Phrase Voice Stop
Figure 5.4 Timing when SW3-SW0 are Changed during Playback If playback is attempted at an unused address in the phrase ROM, then AOUT goes to 1/2 VDD and playback does not occur. Figure 5.5 shows the timing.
A2 - A0 (I) SW3 - SW1 (I) "L" SW0 (I) BUSY (O) AOUT (O) Oscillation Startup tL+tDAR+tBN tBN
Figure 5.5 Timing when Playback is Attempted at an Unused Phrase Address In the SW interface, addresses (against SW3-SW0) that do not start up voice playback exist without fail. When power is turned ON or when input to RESET, the addresses set from SW3 to SW0 become the addresses that do not start up voice playback. Therefore, when the circuit consists of diode matrixes that use push-button switches, the maximum playback phrases become 120 phrases. Combinations of A2-A0 are eight kinds. When addresses of SW3-SW0 that do not start up voice playback are 0000; 27 - 8 = 120 (phrases)
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Semiconductor 5.2 Random Playback Function
MSM6650 Family
The random playback function generates 31 random addresses correspoding to the 5 bits of the addresses of A0, and SW3-SW0 (except ALL "L") on the IC, after which playback commences. This means there is no external input to the A0, SW3-SW0 pins. Since the A0 pin has no internal pullup/pull-down resistor, permanently set to "L" or "H". Playback will not occur if none of the 31 addresses have been assigned a phrase. Caution is advised when creating ROM data. For example, when four phrases, "sunny", "rainy", "cloudy", and "snowy" are to be played, set the phrases as shown in Table 5.1 to 31 random addresses. The four phrases are then played at random as shown below. Table 5.1 Random Address Setup Example
A2, A1 00 A0, SW3-SW0 00001 00010 00011 00100 00101 Phrase Sunny Rainy Cloudy Snowy Sunny
11110 11111
Rainy Snowy
Random playback occurs in accordance with the timing shown in Figure 5.6. The random address is captured at the fall of the RND pin, and voice playback commences. When power is turned ON, or when RESET is input, the phrase at address "00001" is played while a random counter remains initialized until random playback is initiated.
RND (I) BUSY (O) AOUT (O) tRA
tw(RAN)
Random Address Fixed Time
Voice Output Oscillation Startup
Figure 5.6 Random Address Capture
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Semiconductor
MSM6650 Family
Table 5.2 Addresses for Random Play
A2, A1 00 A0, SW3-SW0 * 00001 11111 01 10 11 Same as above Same as above Code Description Random Playback Address (31 Types)
*
Address(es) corresponding to A0, SW3-SW0 pins.
For a random address, 31 phrases can be set for each LOGICAL condition of addresses A2 and A1 (i.e., "00", "01", "10", and "11"). In random playback, note that the four logic states (00, 01, 10, 11) in user specified phrases cannot be used when the phrase ROM data is prepared. A random address is set by the "H" level time of the RND pin, so if the same pulse width is input by microcontroller, the random address fixed time becomes constant, and a "random" phrase may not be played under these conditions. The random address fixed time must be inconsistent in order to produce random playback.
RND (I) BUSY (O) AOUT (O) Oscillation Startup
Invalid Pulse
Figure 5.7 Timing when a Pulse is Input to the RND Pin during Random Play
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Semiconductor
MSM6650 Family
RND (I) BUSY (O) AOUT (O) Oscillation Startup 1st Phrase Playback Same Phrase Continuous Playback
Figure 5.8 Repeat Playback Timing of Random Play As shown in Figure 5.7, if a pulse is input to the RND pin during voice playback (BUSY is "L" level), that pulse becomes invalid. If the RND pin remains "L" level after phrase playback has been completed, then the same phrase is repeated, as shown in Figure 5.8. If SW3-SW0 are changed during random playback, voice playback stops, and voice data that corresponds to SW3-SW0 is played. Figure 5.9 shows the timing when SW3-SW0 are changed during random play.
SW3 - SW1 (I) SW0 (I) RND (I) BUSY (O) AOUT (O) Oscillation Startup Playback of Random Address Voice Stop
Figure 5.9 Timing when a Pulse is Input to the SW0 Pin during Random Playback Table 5.3 and Figure 5.10 show the address settings that stop random playback. These settings also stop playback when the "infinite repeat" command is used during edit ROM playback.
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Semiconductor Table 5.3 Random Play and Stop Addresses
A2, A1 00 A0, SW3-SW0 * 00001 11111 01 00001
MSM6650 Family
Code Description Random Play Address (31 Types) Stop Address
*
Addresses corresponding to A0, SW3-SW0 pins.
SW0 SW1 SW2 SW3 A0 A1 A2
RND
Figure 5.10 Circuit Example for Random Play Stop 6. SAMPLING FREQUENCY Sampling frequencies can be specified for each phrase in the voice data of the internal ROM. For channel synthesis, if channels 1 and 2 are played simultaneously, the channel 1 sampling frequency has priority. When channel 2 is played, only the sampling frequency for the first phrase is valid. The following eight frequencies can be selected when creating voice data. 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, 32.0 kHz In standalone, RC oscillation or ceramic oscillation can be selected. If RC oscillation is selected however, 32.0 kHz sampling cannot be selected.
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Semiconductor 7. VOICE PLAYBACK TIME
MSM6650 Family
Table 7.1 shows internal ROM configuration. The actual voice data ROM area is different from the indicated ROM capacity. The voice data management area shown in Table 7.1 is about 6 Kbits, and the edit ROM area includes 16 Kbits. Table 7.1 ROM Configuration
Voice Data Management Area Edit ROM Area Voice Data Area Disabled Area
Use the following formula as a guide to compute voice playback time. Playback Time = (ROM Capacity - 16 - 6) 1024 255/256 Data Rate (kbps) For example, if data was created at a 4.0 kHz sampling rate using the MSM6652 (288-Kbit ROM), the playback time is (288 - 16 - 6) 1024 255/256 16 (kbps) = 16.9 (sec.) 8. CHANNEL STATUS The BUSY pin outputs the status signals. It outputs "L" level when either channel 1 or 2 is playing voice. "H" level is output when power is turned on. 9. PLAYBACK METHOD The MSM6375 family uses the ADPCM playback method, however the MSM6650 family has three playback methods: ADPCM, PCM and melody playback. The respective features and selection criteria are explained below. 9.1 ADPCM Method With the ADPCM (adaptive differential pulse-code modulation) method, basic quantization width D is adaptively changed for each sampling, and is encoded to 4-bit data each time. This further improves the follow-up properties to speech wave forms. Conversion to ADPCM data is performed by the development tool AR761 or AR762. ADPCM is a compression algorithm which provides the best compromise between quality (bandwidth) and memory usage (data rate). ADPCM can be used for accurate reproduction of voice, music, and sound effects.
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Semiconductor 9.2 PCM Method
MSM6650 Family
The PCM method of the MSM6650 family uses an 8-bit straight binary format. Of the three methods, PCM is best suited to accurate reproduction of sound effects or waveforms which are pulse shaped or change rapidly (such as high frequency pure tone sine-waves). 9.3 Melody Playback Method The AR761 and AR762 development tools support melody regeneration system. The melody data can be composed by using these tools. Therefore, unique sound can be created. 9.4 Data Rate of Each Method The data rate shows the degree of data compression and the data amount to synthesize for 1 second. The data rate is determined by the relationship between the sampling frequency and the format (number of bits per sample). The following formula is used. Data rate (kbps) = Sampling frequency (kHz) Number of bits per sample The data rate of the three methods are compared below when the sampling frequency is 6.4 kHz. 1) ADPCM Method Data Rate (kbps) = 6.4 (kHz) 4 (bit) = 25.6 (kbps) 2) PCM Method Data Rate (kbps) = 6.4 (kHz) 8 (bit) = 51.2 (kbps) 3) Melody Playback Method With the melody playback method, the data rate changes depend on the tempo or the kind of note ( ) used. The formula does not determine the data rate changes. The average data rate is 8 kbps. The data rate of the melody playback method is calculated as follows: Data rate = number of notes per second data amount per note [kbits] For example, to obtain data rate from the following conditions, fSAM = 6.4 kHz Number of notes per second = 1 Time [seconds] taken for each thirty-second note = 0.083 sec (Tempo = 90) first, obtain the data amount per note with the following expression: Data amount per note [kbits] = data amount per thirty-second note [bits per note] 2 = Time taken for each thirty-second note [sec] fsam [Hz] 8 [bits] 2 = 0.083 6400 8 2 = 8.5 [kbits] Therefore, when the number of notes per second is 1, the data rate is approximately 8.5 kbps.
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Semiconductor 9.5 Channel Synthesis Combinations for Each Playback Method Melody and Beep Tone playback is in channel 1 only. Table 9.1 Channel Synthesis Combinations
Channel 2 Channel 1 VOICE (ADPCM) 0 dB -6 to -18 dB 0 dB MELODY -6 to -18 dB 0 dB PCM -6 to -18 dB BEEP TONE SILENCE * * * * * VOICE (ADPCM) 0 dB * * * * -6 to -18 dB * MELODY 0 dB * * * * * * * * * PCM -6 to -18 dB *
MSM6650 Family
BEEP TONE
SILENCE

*
In the case of channel synthesis, verify the voice quality with the MSM6650 evaluation board. The combination of channels 1 and 2 can sometimes cause clipping is either of the channels is recorded at a level which is too high.
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Semiconductor 10. STANDBY CONVERSION
MSM6650 Family
When standby conversion is selected by MASK option, if the next phrase does not start within 200 ms after voice ends, the IC enters standby status and all operation stops. If restarted, it takes about 100 ms from the restart to voice start because the "pop noise" suppression circuit is in operation. If standby conversion is not selected by the MASK option, the IC does not enter standby status even if voice playback has ceased. Current is drawn since AOUT remains at about 1/2 VDD and oscillation is in opration. If restarted, playback occurs after 350 ms. To enter standby status when standby conversion is not selected, the RESET pulse must be input. If the RESET pulse is input, the output level at AOUT instantaneously goes to GND level, causing pop noises. Table 10.1 Standby Conversion
Pin Name Standby Conversion Selected No Standby Conversion Selected
MSM6652/53/54/55/56, MSM6652A/53A/54A/55A/56A/58A
-- -- STBY -03 code "L"
Mask option -04 code "H"
MSM66P54/P56 MSM6650
11. VOICE OUTPUT In standalone mode speech is output via an internal low-pass filter (LPF). Table 12.1 shows output level of AOUT pin. This filter consists of switched capacitors. Table 12.2 shows the relationship between sampling frequencies and cutoff frequencies. Table 11.1 Output Level of AOUT Pin
Playback Method ADPCM PCM Melody BEEP Tone Lowest Level approx. 0.15 VDD approx. 0.25 VDD approx. 0.25 VDD approx. 0.25 VDD Center Level approx. 0.5 VDD approx. 0.5 VDD approx. 0.5 VDD approx. 0.5 VDD Highest Level approx. 0.95 VDD approx. 0.75 VDD approx. 0.75 VDD approx. 0.75 VDD
Table 11.2 Cutoff Frequencies of Low Pass Filter
Sampling Frequency (fSAM) 4.0 kHz 5.3 kHz 6.4 kHz 8.0 kHz 10.6 kHz 12.8 kHz 16.0 kHz 32.0 kHz Cutoff Frequency (fCUT) approx. 1.8 kHz approx. 2.6 kHz approx. 2.6 kHz approx. 3.2 kHz approx. 4.2 kHz approx. 5.1 kHz approx. 6.4 kHz approx. 12.8 kHz
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Semiconductor
MSM6650 Family
Each device of the MSM6650 family contains a 4-order LPF using the switched capacitor filter technology. The attenuation is -40 dB/oct. The cutoff frequency and LPF frequency change depending on the sampling frequency (fSAM). The cutoff frequency is 0.4 time as low as the sampling frequency. The LPF frequency characteristics at fSAM = 8 kHz are shown below.
[dB] 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 100 1k 10k [Hz]
LPF frequency characteristics
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Semiconductor 12. LOW-PASS FILTER POP NOISE Each device of the MSM6650 family contains a "pop" noise killer circuit.
MSM6650 Family
However, a low-pass filter selected may cause "pop" noise as the filter output's circled portions of the figure 12.1 change by approx. 0.7 V abruptly.
Standby conversion time
Standby conversion time
Figure 12.1 Pop Noise of Low-Pass Filter "Pop" noise can be reduced by connecting a diode at the AOUT output (as shown below).
AOUT
Figure 12.2 Pop Noise Killer Circuit
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Semiconductor 13. RC OSCILLATION Figure 13.1 shows an external circuit diagram using RC oscillation.
R1 OSC1 R2 OSC2 C OSC3
MSM6650 Family
Figure 13.1 RC Oscillation 13.1 Determining RC Constants The RC oscillation frequency characteristics are shown in Figures 13.2, 13.3, and 13.4. If fOSC is set to 256 kHz, refer to the following values to set the C and R2 based on the printed-circuit board type. R1 = 100 kW, R2 = 30 kW, C = 30 pF R1 = 100 kW, R2 = 25 kW, C = 20 pF R1 = 150 kW, R2 = 45 kW, C = 10 pF (MSM6652/53/54/55/56-xxx, MSM6652A/ 53A/54A/55A/56A/58A-xxx) (MSM66P54-xx/MSM66P56-XX) (MSM6650)
When choosing RC oscillation, the RC oscillation frequency varies according to the fluctuation of the external C and R2. 13.2 Fluctuation of RC Oscillation Frequencies When using a 30 kW R2, the error due to process variations of the IC is 4% maximum so that the fluctuation of the RC oscillation frequency when using a capacitor (C) of 1% accuracy and a resistor (R2) of 2% accuracy is a maximum of 7% approximately.
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Semiconductor
MSM6650 Family
VDD=3 V R1=100 kW C=20 pF VDD=5 V R1=100 kW C=20 pF
400
Oscillation Frequency fOSC (kHz)
300
200
VDD=3 V R1=100 kW C=30 pF VDD=5 V R1=100 kW C=30 pF
100
0
10
20
30
40
50
60
70
Load Resistance R2 (kW)
Figure 13.2 RC Oscillation Frequency Characteristics (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx)
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Semiconductor
MSM6650 Family
400
Oscillation Frequency fOSC (kHz)
VDD=3.5 V R1=100 kW C=20 pF
300
VDD=5.0 V R1=100 kW C=20 pF
200
VDD=3.5 V R1=100 kW C=30 pF VDD=5.0 V R1=100 kW C=30 pF
100
0
10
20
30
40
50
60
70
80
Load Resistance R2 (kW)
Figure 13.3 RC Oscillation Frequency Characteristics (MSM66P54/P56)
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Semiconductor
MSM6650 Family
400 Oscillation Frequency fOSC (kHz)
VDD=5 V R1=150 kW C=10 pF
VDD=5 V R1=100 kW C=10 pF
300
200
VDD=5 V R1=100 kW C=30 pF
100
VDD=5 V R1=150 kW C=30 pF
0
20
30
40
50
60
70
80
Load Resistance R2 (kW)
Figure 13.4 RC Oscillation Frequency Characteristics (MSM6650)
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Semiconductor 14. CERAMIC OSCILLATION Figure 14.1 shows an external circuit diagram using a ceramic oscillation.
MSM6650 Family
XT
XT
C1
C2
Figure 14.1 External Circuit Diagram Figures 14.2 and 14.3 show external circuit diagrams using a ceramic oscillator, CSA4.09MGU and CST4.09MGWU made by Murata MFG. Co., Ltd.
XT
XT
XT
XT
30 pF
30 pF
Internal Capacitor
Figure 14.2 CSA4.09MGU
Figure 14.3 CST4.09MGWU
Figure 14.4 shows an extend circuit diagram using a ceramic oscillator, PBRC4.00MSA/MKS/MWS made by Kyocera Corp. When using an oscillator, 4.00 MHz, playback speed is approximately 2% slower than the speed when using the development tools AR761 and AR762 and demonstration board.
XT
XT
33 pF
33 pF
Figure 14.4 PBRC4.00MSA/MKS/MWS
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Semiconductor 15. POWER SUPPLY (For MSM6650)
MSM6650 Family
The MSM6650 should be powered from a single power source to the analog section and digital section separately, as shown below.
+5 V
DVDD
AVDD
MSM6650
DGND AGND
The following power connections are not permitted.
Analog supply Digital supply DVDD AVDD
Power supply DVDD AVDD
42/124
Semiconductor
MSM6650 Family
APPLICATION CIRCUITS
(MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx)
OSC3
OSC2
AOUT
XT/CR
TEST
SW0
SW1
SW2
SW3
RND A0
A1
Application Circuit in Standalone Mode Supporting 15 Switch-Selected Phrases 43/124
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
A2
GND
VDD
MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56
OSC1
Semiconductor
MSM6650 Family
(MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx)
VDD S4 S3 S2 S1 SW1 SW2 SW3 TEST RND XT/CR A0 A1 A2 GND
MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56
VDD
SW0
AOUT
OSC3 OSC2 OSC1
Application Circuit in Standalone Mode Supporting Four Switch-Selected Words
Switches and Playback Addresses
A2 S1 S2 S3 S4 0 0 0 0 A1 0 0 0 0 A0 0 0 0 0 SW3 0 0 0 1 SW2 0 0 1 0 SW1 0 1 0 0 SW0 1 0 0 0 ADR 01 02 04 08
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Semiconductor
MSM6650 Family
(MSM6650)
GND O0 OE OSC3 OSC2 XT/CR D0 TEST1,3 RND CE A0 OSC1 A2 A1
DGND AGND
VCC
MSM27C512
A15 O7 A0
VPP
RA15
RA0
AVDD
DVDD
AOUT
MSM6650
SW0 SW1 SW2 SW3
Application Circuit in Standalone Mode Supporting 15 Switch-Selected Phrases
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
D7
CE
45/124
Semiconductor
(MSM6650)
2G 1B 1Y3 1Y2 1Y1 1A 1Y0 1G
74HC139
Application Circuit in Standalone Mode Supporting Four 1-Mbit EPROMs
DVDD
CE AOUT RA18 SW0 RA17 SW1 RA16 SW2 SW3
AVDD
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
A16
A16
A16
A16
RA0 TEST1 TEST3 D7 RND TEST2 STBY D0 XT/CR CPU OSC3 A0 OSC2 A1 OSC1 A2
DGND AGND
MSM6650
MSM27C101
GND
MSM27C101
MSM27C101
MSM27C101
A0 O7
A0 O7
A0 O7
A0 O7
O0
O0
O0
O0
MSM6650 Family
CE
CE
GND
CE
GND
CE
GND
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Semiconductor
MSM6650 Family
MICROCONTROLLER INTERFACE MODE
FEATURES
Device name MSM6652, 6652A MSM6653, 6653A MSM6654, 6654A MSM6655, 6655A MSM6656, 6656A MSM6658A MSM66P54 MSM66P56 MSM6650 Maximum playback time (sec) Data ROM size fSAM=4.0 kHz fSAM=6.4 kHz fSAM=8.0 kHz fSAM=16 kHz fSAM=32 kHz 288 Kbits 544 Kbits 1 Mbit 1.5 Mbits 2 Mbits 4 Mbits 1 Mbit 2 Mbit 64 Mbits (Max) 16.9 31.2 63.8 96.5 129.1 259.7 63.8 129.1 4194.3 10.5 19.5 39.9 60.3 80.7 162.9 39.9 80.7 2620.5 8.4 15.6 31.9 48.2 64.5 129.8 31.9 64.5 2096.4 4.2 7.8 15.9 24.1 32.2 64.9 15.9 32.2 1048.2 2.1 3.9 7.9 12.0 16.1 32.4 7.9 16.1 524.1
Note: Actual voice ROM area is smaller by 22 Kbits. * 4-bit ADPCM or 8-bit PCM sound generation * Melody function * Edit ROM function * Two-channel mixing function * Fade-out function via four-step sound volume attenuation * Serial input or parallel input selectable * Built-in beep tone of 0.5 kHz, 1.0 kHz, 1.3 kHz, or 2.0 kHz selectable with a specific code * Sampling frequency of 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, or 32.0 kHz (32 kHz sampling is not possible when using RC oscillation) * Up to 127 phrases * Built-in 12-bit D/A converter * Built-in -40 dB/octave low-pass filter * Standby function * Package options: 18-pin plastic DIP (DIP18-P-300-2.54) (Product name: MSM6652-xxxRS/MSM6653-xxxRS/ MSM6654-xxxRS/MSM6655-xxxRS/ MSM6656-xxxRS/MSM6652A-xxxRS/ MSM6653A-xxxRS/MSM6654A-xxxRS/ MSM6655A-xxxRS/MSM6656A-xxxRS/ MSM6658A-xxxRS) 24-pin plastic SOP (SOP24-P-430-1.27-K) (Product name:MSM6652-xxxGS-K/MSM6653-xxxGS-K/ MSM6654-xxxGS-K/MSM6655-xxxGS-K/ MSM6656-xxxGS-K/MSM6652A-xxxGS-K/ MSM6653A-xxxGS-K/MSM6654A-xxxGS-K/ MSM6655A-xxxGS-K/MSM6656A-xxxGS-K/ MSM6658A-xxxGS-K/MSM66P54-01GS-K/ MSM66P54-02GS-K/MSM66P56-01GS-K/ MSM66P56-02GS-K) 20-pin plastic DIP (DIP20-P-300-2.54-W1) (Product name: MSM66P54-01RS/MSM66P54-02RS/ MSM66P56-01RS/MSM66P56-02RS) 64-pin plastic QFP (QFP64-P-1420-1.00-BK)(Product name: MSM6650GS-BK) 64-pin plastic SDIP (SDIP64-P-750-1.78) (Product name: MSM6650SS)
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Semiconductor * Option Table
Pin Name
MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A
MSM6650 Family
Microcontroller Interface Mode Serial Input
Standalone Mode No Standby
*1
Parallel Input With Standby Mask Option
-- -- CPU SERIAL STBY -01 "H" "H" -- -02 "H" "L" --
MSM66P54/P56 MSM6650
-03 "L" "L" "L"
-04 "L" "L" "H"
*2
*1. The options for the mask ROM-based devices are mask options. The user should send OKI an option list before starting development. A sample of option list is shown below. *2. A code of OTP version device corresponds to one of the options. The user should specify either MSM66P54-01 or MSM66P54-02 or MSM66P56-01 or MSM66P56-02. (In this case, no option list is required.)
Oki Electric Industry Co., Ltd. Date:
Option List
You are requested to develop MSM665X-XXX on the following conditions. 1. Options There are four options for the MSM6650 family. Choose and circle the desired option. Option Option A Option B Option C Option D Interface mode Microcontroller Microcontroller Standalone Standalone Input Serial Parallel -- -- Standby conversion -- -- Yes No
2. Package and quantity Item Package (circle the desired one) 18-pin DIP (ceramic) 18-pin DIP (plastic) 24-pin SOP (ceramic) 24-pin SOP (plastic) Quantity Note Up to 10 samples. Operating temp. : 10 to 30C Up to 50 samples
Ceramic sample Mold sample
chip
pcs
chip
pcs
Mass production
18-pin DIP (plastic)
24-pin SOP (plastic)
chip pcs per lot monthly Signed by Title : Company name :
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Semiconductor
MSM6652/53/54/55/56-xxx MSM6652A/53A/54A/55A/56A/58A-xxx
BLOCK DIAGRAMS
I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0
Address & Command Controller
7
16-Bit (MSM6652/52A) 17-Bit (MSM6653/53A) 17-Bit (MSM6654/54A) 18-Bit (MSM6655/55A) 18-Bit (MSM6656/56A) 19-Bit (MSM6658A) Multiplexer
288-Kbit 544-Kbit 1-Mbit 1.5-Mbit 2-Mbit 4-Mbit
(MSM6652/52A) (MSM6653/53A) (MSM6654/54A) (MSM6655/55A) (MSM6656/56A) (MSM6658A) ROM (Containing 22-Kbit Edit ROM & Address ROM)
8
CH ST CMD BUSY NAR I/O Interface
16-Bit (MSM6652/52A) 17-Bit (MSM6653/53A) 17-Bit (MSM6654/54A) 18-Bit (MSM6655/55A) 18-Bit (MSM6656/56A) 19-Bit (MSM6658A) Address Counter
DATA Controller
ADPCM Synthesizer
PCM Synthesizer 12 Melody Generator 12-Bit DAC
XT OSC XT Timing Controller BEEP Tone Generator LPF
MSM6650 Family
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RESET
VDD
GND
AOUT
Semiconductor
MSM66P54/P56-xx
VPP
PGM
Program Circuit I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0
Address & Command Controller
7
17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-XX) Multiplexer
1-Mbit OTP ROM (MSM66P54-xx) 2-Mbit OTP ROM (MSM66P56-XX) (Containing 22-Kbit Edit ROM & Address ROM)
8
ADPCM Synthesizer CH ST CMD BUSY NAR 12 12-Bit DAC I/O Interface 17-Bit (MSM66P54-xx) 18-Bit (MSM66P56-XX) Address Counter DATA Controller PCM Synthesizer
Melody Generator XT XT OSC Timing Controller BEEP Tone Generator
MSM6650 Family
LPF
50/124
RESET
VDD
GND
AOUT
Semiconductor
MSM6650
RA22
RA0
D7
D0
I6/SD I5/SI I4 I3/PORT1 I2/PORT0 I1 I0
8-Bit LATCH Address & Switching Controller 7 23-Bit Multiplexer 8
CH ST CMD CE RCS BUSY NAR IBUSY STANDBY
DATA Controller 23-Bit Address Counter I/O Interface
ADPCM Synthesizer
PCM Synthesizer 12 Melody Generator 12-Bit DAC
XT XT MCK OSC Timing Controller BEEP Tone Generator LPF
MSM6650 Family
51/124
TEST1
RESET CPU TEST2 SERIAL DVDD DGND
AGND AVDD AOUT
Semiconductor
MSM6650 Family
PIN CONFIGURATION (TOP VIEW)
The MSM66P54/P56-xx has two more pins than the MSM6652-6658A while their pin configurations are identical. The additional two pins (VPP, PGM) of the MSM66P54/P56-xx may be open at playback after completion of writing.
MSM6652-6658A (Mask ROM)
I4 I5/SI I6/SD CH RESET 1 2 3 4 5 6 7 8 9 18 I3/PORT1 17 I2/PORT0 16 I1 15 I0 14 ST
MSM66P54/P56 (OTP)
VPP I4 I5/SI I6/SD CH 1 2 3 4 5 6 7 8 9 20 PGM 19 I3/PORT1 18 I2/PORT0 17 I1 16 I0 15 ST 14 CMD 13 XT 12 XT 11 VDD
MSM6652-xxxRS, MSM6653-xxxRS, MSM6654-xxxRS, MSM6655-xxxRS, MSM6656-xxxRS, MSM6652A-xxxRS, MSM6653A-xxxRS, MSM6654A-xxxRS, MSM6655A-xxxRS, MSM6656A-xxxRS, MSM6658A-xxxRS
MSM6652-6658A (Mask ROM)

BUSY NAR 13 CMD 12 XT 11 XT RESET BUSY NAR AOUT GND 10 VDD AOUT
18-Pin Plastic DIP
GND 10
20-Pin Plastic DIP
MSM66P54-01/-02RS MSM66P56-01/-02RS
MSM66P54/P56 (OTP)
24 23 22 21 20 19 18 17 16 15 14 13 GND AOUT NAR NC BUSY NC VPP RESET CH I6/SD I5/SI I4
VDD XT XT
1 2 3 4 5 6 7 8 9
24 23 22 21 20 19 18 17 16 15 14 13
GND
VDD XT XT
1 2 3 4 5 6 7 8 9
AOUT NAR NC
NC
NC
CMD NC NC ST I0 I1
BUSY NC NC
CMD NC
PGM ST I0 I1
RESET CH I6/SD I5/SI I4
10 11 12
10 11 12
I2/PORT0 I3/PORT1
I2/PORT0 I3/PORT1
24-Pin Plastic SOP
24-Pin Plastic SOP
MSM6652-xxxGS-K, MSM6653-xxxGS-K, MSM6654-xxxGS-K, MSM6655-xxxGS-K, MSM6656-xxxGS-K, MSM6652A-xxxGS-K, MSM6653A-xxxGS-K, MSM6654A-xxxGS-K, MSM6655A-xxxGS-K, MSM6656A-xxxGS-K, MSM6658A-xxxGS-K
MSM66P54-01/-02GS-K MSM66P56-01/-02GS-K
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Semiconductor MSM6650
Product name: MSM6650GS-BK
NC NC BUSY NAR AOUT AGND DGND AVDD DVDD XT XT MCK CMD ST TEST1 CPU SERIAL IBUSY NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
STANDBY I0 I1 I2/PORT0 I3/PORT1 I4 I5/SI I6/SD CH RESET CE RCS D0
,
64 63 62 61 60 59 58 57 20 21 22 23 24 25 26 27
MSM6650 Family
56
55
54
53
52
TEST2 RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 RA11
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
RA10 RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0 D7 D6 D5 D4 D3 D2 D1 NC
28
29
30
31
NC : No connection 64-Pin Plastic QFP
32
53/124
Semiconductor
MSM6650 Family
XT MCK CMD ST TEST1 CPU SERIAL IBUSY NC STANDBY I0 I1 I2/PORT0 I3/PORT1 I4 I5/SI I6/SD CH RESET CE RCS D0 NC D1 D2 D3 D4 D5 D6 D7 RA0 RA1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
XT DVDD AVDD DGND AGND AOUT NAR BUSY NC TEST2 RA22 RA21 RA20 RA19 RA18 RA17 RA16 RA15 RA14 RA13 RA12 RA11 RA10 NC RA9 RA8 RA7 RA6 RA5 RA4 RA3 RA2
NC : No connection 64-Pin Plastic SDIP
54/124
Semiconductor
MSM6650 Family
PIN DESCRIPTIONS
1.MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx 18-Pin plastic DIP
Pin Symbol Type Description Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized. The devices have an internal power-on reset. VDD must be raised within 1 ms to operate power-on reset correctly. If VDD is not raised within 1 ms, then the RESET pulse must be applied when power is turned ON. This pin has an internal pull-up resistor. Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. The CMD and ST inputs become effective when high. NAR indicates whether the 7 NAR O address bus (I0 through I6) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 8 11 12 AOUT XT XT CMD O I O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. Ceramic Oscillator Input. This pin has an internal 0.5 to 5 MW feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. Ceramic Oscillator Output. If an external clock is used, leave this pin open. Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. Start. Speech playback starts at the fall of the ST pulse. The I0 - I6 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. This pin is command and user-defined phrase input when parallel input is optioned. 18 I3/PORT1 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned. 17 I2/PORT0 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned. 15, 16 9 10 I0, I1 GND VDD I -- -- When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. Ground pin. Power supply. Insert a 0.1F ro more bypass capacitor between this pin and GND.
5
RESET
I
6
BUSY
O
13
I
14
ST CH I6/SD I5/SI
I
4 3 2
I I I
1
I4
I
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Semiconductor
MSM6650 Family
2.MSM66P54/P56-xx 20-Pin plastic DIP
Pin Symbol Type Description Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized. The devices have an internal power-on reset. VDD must be raised within 1 ms to operate power-on reset correctly. If VDD is not raised within 1 ms, then the RESET pulse must be applied when power is turned ON. This pin has an internal pull-up resistor. Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. The CMD and ST inputs become effective when high. NAR indicates whether the 8 NAR O address bus (I0 through I6) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 9 12 13 AOUT XT XT CMD O I O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. Ceramic Oscillator Input. This pin has an internal 0.5 to 5 MW feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. Ceramic Oscillator Output. If an external clock is used, leave this pin open. Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. Start. Speech playback starts at the fall of the ST pulse. The I0 - I6 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. This pin is command and user-defined phrase input when parallel input is optioned. 19 I3/PORT1 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned. 18 I2/PORT0 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned. 16, 17 10 11 1 20 I0, I1 GND VDD Vpp PGM I -- -- -- I When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. Ground pin. Power supply. Insert a 0.1F ro more bypass capacitor between this pin and GND. Supply voltage for writing data to internal OTP ROM. Interface with voice analysis edit tools AR761 and AR762. Set to "L" level or leave open during playback. This pin has an internal pull-down resistor.
6
RESET
I
7
BUSY
O
14
I
15
ST CH I6/SD I5/SI
I
5 4 3
I I I
2
I4
I
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Semiconductor
MSM6650 Family
3.MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx 24-Pin plastic SOP
Pin Symbol Type Description Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized. The devices have an internal power-on reset. VDD must be raised within 1 ms to operate power-on reset correctly. If VDD is not raised within 1 ms, then the RESET pulse must be applied when power is turned ON. This pin has an internal pull-up resistor. Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. The CMD and ST inputs become effective when high. NAR indicates whether the 22 NAR O address bus (I0 through I6) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. 23 2 3 AOUT XT XT CMD O I O Analog Speech Output. D/A converter output or LPF output is selected by entering the command. Ceramic Oscillator Input. This pin has an internal 0.5 to 5 MW feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. Ceramic Oscillator Output. If an external clock is used, leave this pin open. Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. Start. Speech playback starts at the fall of the ST pulse. The I0 - I6 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. This pin is command and user-defined phrase input when parallel input is optioned. 12 I3/PORT1 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned. 11 I2/PORT0 I/O When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code.
17
RESET
I
20
BUSY
O
5
I
8
ST CH I6/SD I5/SI
I
16 15 14
I I I
13
I4
I
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Semiconductor
MSM6650 Family
Pin 9, 10 24 1 18 7
Symbol Type I0, I1 GND VDD VPP * PGM * I -- -- -- I
Description This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. Ground pin. Power supply. Insert a 0.1F ro more bypass capacitor between this pin and GND. Supply voltage for writing data to internal OTP ROM. Interface with voice analysis edit tools AR761 and AR762. Set to "L" level or leave open during playback. This pin has an internal pull-down resistor.
*
Pins for MSM66P54/56-xx only
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Semiconductor 4.MSM6650 64-Pin plastic QFP (64-Pin plastic SDIP)
Pin Symbol Type
MSM6650 Family
29 (19)
RESET
I
Description Reset. The devices enter stanby status when a low level is input to this pin. When RESET, oscillation stops. The AOUT output goes to ground and the IC status is reinitialized. The devices have an internal power-on reset. VDD must be raised within 1 ms to operate power-on reset correctly. If VDD is not raised within 1 ms, then the RESET pulse must be applied when power is turned ON. This pin has an internal pull-up resistor. Busy. Outputs a "L" level during playback and a "H" level when power is turned ON. The CMD and ST inputs become effective when high. NAR indicates whether the address bus (I0 through I6) is ready to accept another address. When high, it is ready to accept. NAR goes high when power is turned ON. Analog Speech Output. D/A converter output or LPF output is selected by entering the command. Ceramic Oscillator Input. This pin has an internal 0.5 to 5 MW feedback resistor between XT and XT. If an external clock is used, this is the clock input pin. Ceramic Oscillator Output. If an external clock is used, leave this pin open. Command Input and Option Control. This pin is used as command and option input when CMD is at the high level with ST low. If this pin is not used or serial input is optioned, set this pin to "H" level. This pin has an internal pull-up resistor. Start. Speech playback starts at the fall of the ST pulse. The I0 - I6 addresses are latched at the rise of the ST pulse. Input a ST pulse when NAR goes to the high level for channels 1 and 2. This pin has an internal pull-up resistor. Channel Control. Channel 1 is selected when the input is pulled high. Channel 2 is selected when the input is low. This pin has an internal pull-up resistor. This pin is command and user-defined phrase input when parallel input is optioned. This pin is serial data (command and address) input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. This pin is used as serial clock input when serial input is optioned. This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor. This pin is command and user-defined phrase input when parallel input is optioned. When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned.
3 (57) 4 (58)
BUSY NAR
O O
5 (59) 10 (64) 11 (1)
AOUT XT XT CMD
O I O
13 (3)
I
14 (4)
ST CH I6/SD I5/SI
I
28 (18) 27 (17) 26 (16)
I I I
25 (15)
I4
I
24 (14)
I3/PORT1
I/O
23 (13)
I2/PORT0
I/O
When serial input is optioned, this pin is a port output. The port output is controlled by entering external silence insertion code. This pin is command and user-defined phrase input when parallel input is optioned.
21, 22 (11, 12)
I0, I1
I
When serial input is optioned, set this pin to "L" level. This pin has an internal pull-down resistor.
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Semiconductor
MSM6650 Family
Pin 6 (60) 7 (61) 8 (62) 9 (63) 12 (2) 16 (6) 17 (7)
Symbol Type AGND DGND AVDD DVDD MCK CPU SERIAL -- -- -- -- O I I Analog ground pin. Digital ground pin.
Description
Analog power pin. Insert a 0.1mF or more bypass capacitor between this pin and AGND. Digital power pin. Insert a 0.1mF or more bypass capacitor between this pin and DGND. Main clock output pin. Use MCK as a connection pin for the MSC1192, etc. When the IC is in standby status, MCK is held high. CPU Mode. Set to "H" level to select Microcontroller Interface Mode. Serial/Parallel Interface Select. This input selects either the parallel or the serial input interface. The serial input interface is selected with a high level; the parallel input interface is selected with a low level. Chip Enable. CE is a timing output pin to control read of external memory. This pin outputs when RCS is at the "L" level. This pin goes high impedance when RCS is at the "H" level. Read Chip Select. The data bits D0-D7 are internally pulled down when RCS is high. External Memory Data Bus. Data is input when RCS is low. When RCS is high, these pins become low due to internal pull-down resistors. External Memory Address. These are address pins for an external memory output when RCS is low. These pins become high impedance status if RCS is in "H" level. Test. Set these pins to "H" level. Outputs a "L" level during playback or when AOUT is at 1/2 VDD (except standby conversion) Outputs a "L" level during which the device is oscillating.
30 (20) 31 (21) 32, 34-40 (22, 24-30) 41-63 (31-40, 42-54) 15, 64 (5, 55) 18 (8) 20 (10)
CE RCS D0 - D7 RA0 - RA22 TEST1, 2 IBUSY STANDBY
O I I O I O O
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Semiconductor
MSM6650 Family
ABSOLUTE MAXIMUM RATINGS
(GND=0 V) Parameter Power supply voltage Input voltage Storage temperature Symbol VDD VIN TSTG -- Condition Ta = 25C Rating -0.3 to +7.0 -0.3 to VDD+0.3 -55 to +150 Unit V V C
RECOMMENDED OPERATING CONDITIONS
(GND=0 V) Parameter Power supply voltage Operating temperature Master clock frequency Symbol VDD Top fOSC Condition MSM6652-56, MSM6650, MSM6652A-56A MSM6658A, MSM66P54/P56 -- -- Min. 3.5 Range 2.4 to 5.5 3.5 to 5.5 -40 to +85 Typ. 4.096 Max. 4.5 Unit V V C MHz
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Semiconductor
MSM6650 Family
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter High level input voltage Low level input voltage High level output voltage Low level output voltage High level input current 1 High level input current 2 Low level input current 1 Low level input current 2 Operating current Standby current D/A output relative accuracy D/A output impedance LPF driving resisance LPF output impedance
*1
Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS |VDAE| RDAO RAOUT RLPF
Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistor VIL=GND Internal pull-up resistor -- Ta=-40C to +50C Ta=50C to 85C When D/A output selected When D/A output selected *2 When D/A output selected *3 When LPF output selected
IF=100 mA
(VDD=5.0 V, GND=0 V, Ta=-40 to +85C) Min. Typ. Max. Unit -- 4.2 -- V -- 4.6 -- -- 30 -10 -200 -- -- -- -- 15 15 50 -- -- -- -- -- 90 -- -90 6 -- -- -- 25 30 -- 1 0.8 -- 0.4 10 200 -- -30 10 10 30 40 35 45 -- 3 V V V mA mA mA mA mA mA mA mV kW kW kW kW
*1. Applied to RESET, CMD, ST, CH. *2. Applied to MSM6652/53/54/55/56, MSM6652A/53A/54A/55A/56A/58A, MSM6650. *3. Applied to MSM66P54/P56. DC Characteristics
Parameter High level input voltage Low level input voltage High level output voltage Low level output voltage High level input current 1 High level input current 2 Low level input current 1 Low level input current 2 (Note) Operating current Standby current D/A output relative accuracy D/A output impedance LPF driving resistance LPF output impedance Symbol VIH VIL VOH VOL IIH1 IIH2 IIL1 IIL2 IDD IDS |VDAE| RDAO RAOUT RLPF Condition -- -- IOH=-1 mA IOL=2 mA VIH=VDD Internal pull-down resistor VIL=GND Internal pull-up resistor -- Ta=-40C to +50C Ta=50C to 85C When D/A output selected When D/A output selected When LPF output selected IF=100 mA (VDD=3.1 V, GND=0 V, Ta=-40 to +85C) Min. 2.7 -- 2.6 -- -- 10 -10 -100 -- -- -- -- 15 50 -- Typ. -- -- -- -- -- 30 -- -30 4 -- -- -- 25 -- 1 Max. -- 0.5 -- 0.4 10 100 -- -10 7 5 20 20 35 -- 3 Unit V V V V mA mA mA mA mA mA mA mV kW kW kW
Note: Applied to RESET, CMD, ST, CH.
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Semiconductor AC Characteristics
Parameter Master clock duty cycle RESET input pulse width RESET input time after power-on ST input pulse width ST-ST pulse interval ST-ST pulse interval Data setup time Data hold time Command setup time 1 Command setup time 2 Command hold time Channel setup time Channel hold time Serial clock pulse width Serial clock setup time Serial clock hold time Serial data setup time Serial data hold time BUSY output time 1 BUSY output time 2 BUSY output time 3 NAR output time 1 NAR output time 2 NAR output time 3 NAR output time 4 D/A converter change time LPF stable time Standby conversion time (after voice ends) Address capture time Symbol fduty tw(RST) tD(RST) t(ST) tss tSISS tDW tWD tCSF tCS tSC tCHS tSCH tw(SCK) tSIS tSSI tSDS tSSD tSBS tBN tBA tSNS tNAA tNAB tNAC tDAR,tDAF tL tSTB tCED Condition -- -- -- When using parallel input When the STOP code is input During serial input -- -- At power-on -- -- -- -- When using serial input -- -- When using serial input When using serial input -- When fSAM=8 kHz When fSAM=8 kHz -- When fSAM=8 kHz When fSAM=8 kHz When fSAM=8 kHz -- -- -- For MSM6650
MSM6650 Family
(VDD=2.4 to 5.5 V, GND=0 V, Ta=-40 to +85C) (VDD=3.5 to 5.5 V, GND=0 V, Ta=-40 to +85C) * Min. 40 10 0 0.35 40 1 1 1 1 1 1 1 1 0.35 1 1 1 1 -- 350 350 -- 350 350 350 60 6 0.15 500 Typ. 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 375 375 -- 375 375 375 64 8 0.2 -- Max. 60 -- -- 2000 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 10 400 400 10 400 400 500 68 10 0.25 -- Unit % ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms ms sec ms
*
Applied to MSM6658A-xxx and MSM66P54/P56-xx.
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Semiconductor
MSM6650 Family
TIMING DIAGRAMS
Power-On Timing
VDD RESET ( I ) BUSY (O) CMD or ST (I)
tD(RST) tW(RST) tCSF
Standby State Timing when IC is Activated
I6-I0 (I) CMD (I) ST (I) NAR (O) BUSY (O) AOUT (O) tL tDAR Voice Playback tSTB tDAF tCS tDW tSC tWD
t(ST)
tSNS tSBS
tNAA
Oscillation Statup
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Semiconductor
Channel 1 Playback Timing with No Extemal Commands (Parallel Input)
CH ( I ) I6 - I0 (I) CMD ( I ) "H" ST ( I ) NAR (O) BUSY (O) tL AOUT (O)
1st Phrase Play Oscillation Startup 2nd Phrase Play 3rd Phrase Play
"H"
1st Phrase Adress
2nd Phrase Address
3rd Phrase Address
tNAB tBN
tNAC tBA
tDAR
MSM6650 Family
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Semiconductor
Channel 1 Playback Timing when External Commands are Used (Parallel Input)
CH ( I ) I6 - I0 (I) CMD ( I ) ST ( I ) NAR (O) BUSY (O) AOUT (O)
Oscillation Startup
"H"
Command Data
1st Phrase (Adress Data)
2nd Phrase (Adress Data)
1st Phrase Play
2nd Phrase Play
MSM6650 Family
Playback timing set by entering an external command remains unchanged unless other external command is entered. Therefore, both 1st phrase and 2nd phrase are played in the same timing. To change playback timing, be sure to enter command data before address data. 66/124
Semiconductor
Channels 1 and 2 Playback Timing when External Commands are Used (Parallel Input)
CH ( I ) I6 - I0 (I) CMD ( I ) tCHS ST ( I ) NAR (O) BUSY (O) AOUT (O) Oscillation Startup "H"
Command Data
1st Phrase (Adress Data)
Command Data
2nd Phrase (Address Data)
3rd Phrase (Adress Data)
tSCH
1st Phrase Play 2nd Phrase Play
3rd Phrase Play
Channel 2 Playback
MSM6650 Family
Command data keeps a just previous command regardless of the channel. If playback starts without setting of command, the 3rd phrase is played as set in the 2nd phrase. 67/124
Semiconductor
Playback Timing with No External Commands (Serial Input)
CH ( I ) I6/SD ( I ) tSDS I5/SI ( I ) tSIS CMD ( I ) ST ( I ) BUSY (O) NAR (O) AOUT (O) 1st Phrase Play Oscillation Startup "H" tSSI tSIS tSSD tW(SCK) "H" 1st Phrase Adress Serial Input 2nd Phrase Address Serial Input
MSM6650 Family
When serial input is selected, data is transferred into the IC when the ST signal is triggered after serial data is entered. SD is captured on the leading edge of SI.
Note : Set I5/SI to "L" level before ST falls to "L" level.
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Semiconductor
Playback Timing with External Commands (Serial Input)
CH(I) "H" I6/SD(I) Silence Command Input Command Serial Input 1st Phrase Address Serial Input
I5/SI(I) I3/PORT1(O) I2/PORT0(O) CMD(I) ST(I) BUSY (O) NAR(O) tSISS "H"
AOUT(O) Port Output Oscillaiton Startup Playback Command Setting
Serial input enables setting a port output by entering a command. Since port output commands and internal commands are shared, if a command for port output is entered, address data should be entered after a command for voice is entered. Otherwise, the input is recognized as a silence insertion code by the IC. The umber of command inputs are not limited until address input. However, an efective command is the one finally entered (common for channel 1 and channel 2).
MSM6650 Family
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Semiconductor
MSM6650 Family
FUNCTIONAL DESCRIPTION
Parallel or serial input can be selected for the microcontroller interface. Table 1.1 shows the correspondence, between serial input and parallel input. Table 1.1 Interface
Pin name
MSM6652/53/54/55/56, MSM6652A/53A/54A/55A/56A/58A
Serial input Mask option -01 code "H" "H"
Parallel input
-- -- CPU SERIAL
MSM66P54/P56 MSM6650
-02 code "H" "L"
1. PLAYBACK CODE SPECIFICATION The user can specify a maximum of 127 phrases. Table 1.1 shows the settings by I6 to I0. Table 1.2 User Specified Phrase List
I6-I0 0000000 0000001 1111111 Code Details Stop Code User Specified Phrase (127 Phrases)
2. INTERNAL ROM USAGE AND DISABLED AREA (MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xxx) The last 3 bytes of the internal ROM are not to be used as shown in Table 2.1. Please do not use these when creating the sound ROM. Table 2.1 shows the addresses that are disabled. Table 2.1 Internal ROM Layout and Disabled Area
Type MSM6652, 6652A MSM6653, 6653A MSM6654, 6654A MSM6655, 6655A MSM6656, 6656A MSM6658A MSM66P54 MSM66P56 Voice Data Area 00B00-08FFC 00B00-10FFC 00B00-1FFFC 00B00-2FFFC 00B00-3FFFC 00B00-7FFFC 00B00-1FFFC 00B00-3FFFC Disabled Area 08FFD, 08FFE, 08FFF 10FFD, 10FFE, 10FFF 1FFFD, 1FFFE, 1FFFF 2FFFD, 2FFFE, 2FFFF 3FFFD, 3FFFE, 3FFFF 7FFFD, 7FFFE, 7FFFF 1FFFD, 1FFFE, 1FFFF 3FFFD, 3FFFE, 3FFFF
Note: Addresses are in hex. 70/124
Semiconductor 3. PULL-UP/PULL-DOWN RESISTOR
MSM6650 Family
RESET, CMD, ST and CH pins have internal pull-up resistor. I6 to I0 pins do not have internal pullup/pull-down resistor. When serial input option is selected, I4, I1 and I0 pins have internal pull-down resistor. Table 3.1 Pins with Pull-up/Pull-down resistor
Serial input MSM6652/53/54/55/56, MSM6652A/53A/54A/ 55A/56A/58A MSM66P54/P56 MSM6650 RESET,CMD,ST,CH RESET,CMD,ST,CH I4, I1, I0 I4, I1, I0 RESET,CMD,ST,CH RESET,CMD,ST,CH -- -- RESET,CMD,ST,CH I4, I1, I0 RESET,CMD,ST,CH -- Parallel input
Pull-up resistor Pull-down resistor Pull-up resistor Pull-down resistor
4. OPTIONS In microcontroller interface mode, two option selection methods are available; i.e. the mask option to be set at the time of manufacture of ROM data and the command option which is set by the command setting. In the mask option, either parallel input or serial input of commands and phrase addresses can be selected. However, when the mask option is selected, no change can be made once the option is selected after manufacture of ROM data. The command option can select three items. Table 4.1 shows selectable options. Table 4.1 Option Item List
No. Item Selection Remarks If standby conversion is selected (Yes), the MSM665X nters standby unless the next specified phrase is input within 200 ms after voice ends.
1 2 3
Standby Conversion AOUT Output Maximum amplitude of a single phrase
Yes LPF Output 0 to VDD
No DAC Output 1/4VDD to 3/4VDD (1/2 amplitude)
Maximum amplitude of a single phrase
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Semiconductor An option is set as in Table 4.2 when power is turned ON.
MSM6650 Family
Table 4.2 Option Selection when Power is Turned ON and at RESET Input
Standby Conversion Yes AOUT Output LPF Output Amplitude for 1 Phrase 0 to VDD
To change an option that is already set, use the command input. If the RESET pin is set to "L" level, the option returns to the status when power was turned ON (Table 4.2). After setting the option, be certain to input the voice, silence and BEEP tone commands, then start up. Figures 4.1 and 4.2 show the option set timing, and Tables 4.3 and 4.4 show the corresponding options.
I6/SD (I) "L" I5/SI (I) "L" I3, I2, I0 (I) CMD (I) ST (I) Option Data Capture Option Set Data
Figure 4.1 Option Set Timing (during Parallel Input)
Table 4.3 Relationship Between Options and I3, I2, I0
I3 AOUT "0" Data "1" Data LPF DAC I2 Standby Conversion Yes No I0 Amplitude of a Single Phrase 0 to VDD 1/4 VDD to 3/4VDD
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Semiconductor
Standby AOUT Conversion I6/SD (I) I5/SI (I) ST (I)
MSM6650 Family
Amplitude of 1 Phrase
Option Data Capture
Figure 4.2 Option Set Timing (during Serial Input)
Table 4.4 Relationship Between Options and Serial Data
AOUT "0" Data "1" Data LPF DAC Standby Conversion YES NO Amplitude of a Single Phrase 0 to VDD 1/4VDD to 3/4VDD
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Semiconductor 5. MICROCONTROLLER INTERFACE MODE
MSM6650 Family
External command settings are enabled with the microcontroller interface. However, if the edit ROM is used, the command settings of channel 1 are disabled. Figures 5.1 and 5.2 show the command input and address input method when using the microcontroller interface.
I6 - I0 ( I ) CMD ( I ) ST ( I ) BUSY (O) NAR (O) AOUT (O) Oscillation Startup Voice End Command Data Adress Data
Figure 5.1 Command, Address Input Timing (Parallel Input)
I6/SD ( I ) I5/SI ( I ) ST ( I ) tSISS BUSY (O) NAR (O) Command Input AOUT (O) Oscillation Startup Adress Input I6 I5 I4 I3 I2 I1 I0 I6 I5 I4 I3 I2 I1 I0
Figure 5.2 Command, Address Input Timing (Serial Input)
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Semiconductor
MSM6650 Family
In microcontroller interface serial input, command and address data are identified by the initial data input serially. If the initial data is "H" level, it is identified as command data, if "L", it is identified as address data. Command and address data must be input after the command and address identification data are input initially. Figures 5.3, 5.4 and 5.5 show the external input flow.
Power ON
NAR is "H"?
NO
YES Adress Input
ST Pulse Input
NO
Voice Ended?
YES End
Figure 5.3 Input Flowchart when Command is Not Set
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Semiconductor
MSM6650 Family
Power ON
Option Set ? YES
NO
NAR is "H" ? Option Code Set YES Channel Set ? 1ch Set CH Pin to "H" Set CH Pin to "L" 2ch Command is Set ? YES Set CMD Pin to "L"
NO
NO
Command Data Input
3
1. Voice 2. BEEP Tone 3. Silence (*) 2 BEEP Tone Set 1. Frequency Set 2. Sound Volume Set ST Pulse Input Set CMD Pin to "H"
1
Silence Insertion Code Set ( PORT Output Set)
Voice Control Code Set 1. Smoothing Set 2. Repeat Set 3. Sound Volume Set ST Pulse Input Set CMD Pin to "H"
ST Pulse Input Set CMD Pin to "H"
Silence Time Set
BEEP Tone Time Set
Phrase Address Input
Adress Data Input
ST Pulse Input
NO
Ended ? YES End
*BEEP tone code cannot be set for channel 2.
Figure 5.4 Parallel Input Flowchart when External Command is Used 76/124
Semiconductor
MSM6650 Family
Power ON NO
Option Set ? YES Set ST Pin to "L" Set I6 Pin to "L" Pulse Input to I5 Option Code Set Set ST Pin to "H"
NAR is "H" YES Command Set ? YES Set ST Pin to "L" 2ch Set I6 Pin to "H" Set CH Pin to "L" Pulse Input to I5
NO
NO
Channel Set ? 1ch Set CH Pin to "H"
3
1. Voice 2. BEEP Tone 3. Silence 2 (*)
1
Silence Insertion Code Set (PORT Output Set)
BEEP Tone Code Set 1. Frequency Set 2. Sound Volume Set Set ST pin to "H" Set ST pin to "L" Set I6 pin to "L" Pulse Input to I5 BEEP Tone Time Set NO
Voice Control Code Set 1. Smoothing Set 2. Repeat Set 3. Sound Volume Set Set ST pin to "H" Set ST pin to "L" Set I6 pin to "L" Pulse Input to I5 Phrase Address Input
Set ST pin to "H" Set ST pin to "L" Set I6 pin to "L" Pulse Input to I5 Silence Time Set
Ended ? YES End
*BEEP tone code cannot be set for channel 2.
Figure 5.5 Serial Input Flowchart when External Command is Used 77/124
Semiconductor 6. COMMAND DATA
MSM6650 Family
Table 6.1 shows the conditions that can be set by the command data. Command data is set with I6I0. In serial input, data is input corresponding to I6-I0 serially as shown in Figure 5.2. Table 6.1 Command Setting Content List
I6 0 I5 0 I4 0 I3 Oa I2 Os I1 0 I0 Ov Option setting Three options can be set. Pin Option item "0" Data "1" Data I3 (Oa) AOUT output LPF DAC I2 (Os) Standby conversion Yes No I0 (Ov) Amplitude of a single phrase 0 to VDD 1/4VDD to 3/4 VDD Command Description
The "0" data option is set upon power on or after RESET input. (See Table 4.2.) 0 1 0 P1 P0 0 0 Silence insertion code The silence insertion code inserts silence into the specified channel. It also sets the port output signals by using the I2 and I3 pins when serial input is selected. After the silence insertion code is input, the silence time is set by address data input. Silence time = Address data (I6 to I0) 16.384 ms 1 0 0 bl1 bl2 bf1 bf2 BEEP tone code
I3(bl1) I2(bl0) 0 0 1 1 0 1 0 1 Volume I1(bf1) I0(bf0) Frequency (kHz) 0 0 1 1 0 1 0 1 0.5 1.0 1.3 2.0
1/8 amplitude of channel 1 1/4 amplitude of channel 1 1/3 amplitude of channel 1 1/2 amplitude of channel 1
After the BEEP tone code is input, the BEEP tone time is set by entering address data. BEEP tone time = Address data (I6 to I0) 16.384 ms 1 1 sm rp1 rp0 vl1 vl2 Voice control code The voice control code sets the number of repeats and sound volume. When the number of repeats is set, sound volume smoothing can also be set.
I4 (sm) Volume smoothing during repeating 0 Disabled 1 Enabled I3(rp1) I2(rp0) Number of repeats 0 0 1 0 1 2 1 0 4 1 1 Infinite I1(vl1) I0(vl0) Attenuation 0 0 0 dB 0 1 -6 dB 1 0 -12 dB 1 1 -18 dB
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Semiconductor 6.1 Option Code Setting
MSM6650 Family
An option can be set by command after power on. Once an option is set, it remains effective until either power is shut OFF or until the RESET signal is input. When an option is set, input speech, silence and BEEP tone commands again by command and address data input (phrase, silence time and BEEP tone time). Table 6.2 shows the options that can be set. Table 6.2 Relationship Between Options and I3, I2, I0
I3 AOUT Output "0" Data "1" Data LPF DAC I2 Standby Conversion YES NO I0
Amplitude of a Single Phrase
0 to VDD 1/4 VDD to 3/4 VDD
See Figure 4.2 for command option set timing chart. Options can be set anytime, but if set during playback, the output impedance and amplitude of AOUT may change.
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Semiconductor 6.2 Silence Insertion Code
MSM6650 Family
Silence insertion code inserts silence in the specified channel externally, thereby reducing voice data. It also sets the port output signals when serial input is selected.
I6 0 I5 1 I4 X I3 p1 I2 p0 I1 X I0 X X: Don't care
Silence is inserted with command data, and silence time is set with address data. The CH pin selects the channel for silence insertion (channel 1 or 2). Silence time is set by address data (I6 to I0). Minimum Silence Time: 16.384 ms Maximum Silence Time: (128 - 1) 16.384 ms = 2.1 sec Figure 6.1 shows the channel 1 silence insertion set timing.
I6/SD ( I ) I5/SI ( I ) I4 - I0 ( I ) CH ( I ) CMD ( I ) ST ( I ) BUSY (O) NAR (O) AOUT (O) Silence Time (tMU) Silence Command Capture Silence Time Capture "H" Don't care Silence Time Setting Data Silence Time Setting Data Silence Time Setting Data
Figure 6.1 Channel 1 Silence Set Timing (Parallel Input)
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Semiconductor
MSM6650 Family
For example, if silence time set data shown in Figure 6.1 is set to (I6 to I0) = ("0011000"), the silence time (tMU) becomes (26 0+25 0+24 1+23 1+22 0+21 0+20 0) 16.384 ms = 393.216 ms The formula to set silence time is shown below. tMU = (26 (I6)+25 (I5)+24 (I4)+23 (I3)+22 (I2)+21 (I1)+20 (I0)) 16.384 ms The channel 2 silence insertion set timing is as shown in Figure 6.2.
I6/SD ( I ) I5/SI ( I ) I4-I0 ( I ) CH ( I ) CMD ( I ) ST ( I ) BUSY (O) NAR (O) AOUT (O) Don't care Silence Time Setting Data Silence Time Setting Data Silence Time Setting Data
Silence Time (tMU) Silence Command Capture Silence Time Capture
Figure 6.2 Channel 2 Silence Set Timing (Parallel Input) In serial input, the port output signals from I3/PORT1, I2/PORT0 are also controlled by the silence insertion code. I3/PORT1, I2/PORT0 are in "L" level when power is turned ON, and when the RESET signal is input. When setting the port outputs, first set the port output with a silence insertion code, then input a voice playback code and set the address. Figure 6.3 shows the timing. A port cannot be set continuously, if it is necessary to set a port again (after previously being set) a BEEP tone or voice playback code must first be input, after which the port can be set again.
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Semiconductor
Figure 6.3 Port Output and Command, Address Set Timing (during Serial Input)
Command (Silence Insertion) Input CH ( I ) I6/SD ( I ) I5/SI ( I ) I3/PORT1 (O) I2/PORT0 (O) CMD ( I ) ST ( I ) "H" "H"
Command (Voice Control) Input
Address Input
tSISS BUSY (O) NAR (O)
MSM6650 Family
AOUT (O) Port Output Oscillation Startup Voice Playback Code Set
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Semiconductor 6.3 BEEP Tone Code
MSM6650 Family
The BEEP tone code produces the tone from an internal circuit which is independent of the ADPCM circuitry. A BEEP tone can be set in channel 1 only. When mixing a BEEP tone (channel 1) and an 8 kHz phrase in channel 2, be advised that playback of the phrase (at 8 kHz), also plays the BEEP tone at the phrase frequency (8 kHz).
I6 1 I5 0 I4 0 I3 bl1 I2 bl0 I1 bf1 I0 bf0
The sound volume is set with I3, I2 pins, and the frequency is set with I1, I0 pins. Tables 6.3 and 6.4 show the sound volumes and the frequencies that can be set. Table 6.3 Sound Volume Settings
I3 0 0 1 1 I2 0 1 0 1 Sound Volume (Note 1) 1/8 amplitude sound volume of channel 1 1/4 amplitude sound volume of channel 1 1/3 amplitude sound volume of channel 1 1/2 amplitude sound volume of channel 1
Table 6.4 Frequency Settings
I1 0 0 1 1 I0 0 1 0 1 Frequency 0.5 kHz 1.0 kHz 1.3 kHz 2.0 kHz
Note
1. If 1/2 amplitude of channel 1 is set, and if the maximum amplitude is set to 1/2 VDD as an option the sound volume of the BEEP tone becomes 1/4 VDD.
The BEEP tone time is set by address data (I6 to I0). Minmum BEEP Tone Time: Maximum BEEP Tone Time: 16.384 ms (128 - 1) 16.384 ms = 2.1 sec. (approx.)
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Semiconductor Figure 6.4 shows BEEP tone set timing.
I6/SD ( I ) I5/SI ( I ) I4 - I0 (I) CH ( I ) CMD ( I ) ST ( I ) BUSY (O) NAR (O) AOUT (O) Sound Volume Frequency Setting "H" BEEP Tone Time Set Data BEEP Tone Time Set Data BEEP Tone Time Set Data
MSM6650 Family
BEEP Tone Time (tBE)
BEEP Tone Command Capture BEEP Tone Time Capture
Figure 6.4 BEEP Set Timing (during Parallel Input) For example, if the BEEP tone time set data shown in Figure 6.4 is set as (I6 to I0) = ("0011000"), the BEEP tone time (tBE) is (26 0+25 0+24 1+23 1+22 0+21 0+20 0) 16.384 ms = 393.216 ms The formula to set BEEP tone time is shown below. tBE = (26 (I6)+25 (I5)+24 (I4)+23 (I3)+22 (I2)+21 (I1)+20 (I0)) 16.384 ms 6.4 Voice Control Code Command data can set the number of repeats and sound volume.
I6 1 I5 1 I4 sm I3 rp1 I2 rp0 I1 vl1 I0 vl0
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Semiconductor
MSM6650 Family
Channel 1 is set when the CH pin is "H" level, channel 2 is set when CH is "L" level. Once a command is set, it is maintained as both channels until another command is input. The condition of each channel is set by I4 to I0. Three conditions can be set: 1) to 3). 1) Setting the Number of Repeats The number of repeats is set by the I3 and I2 pins, and four types can be selected: 1, 2, 4 and infinite. A stop code must be input to stop voice when infinite repeat is selected. Table 6.5 shows the relationship between I3 and I2 pins, and the number of repeats. Table 6.5 Selection of Number of Repeats
I3 0 0 1 1 I2 0 1 0 1 Number of Repeats 1 2 4 Infinite
2) Sound Volume Smoothing During Repeat If "I4" is set to a "1", sound volume during repeat is automatically attenuated from 1 to 1/2, 1/4 and 1/8 (fade-out function). This smoothing, however, is effective only when 2, 4 or infinite is selected for the repeat setting. If infinite is selected, voice is played, remaining at 1/8 sound volume after attenuating from 1, 1/2, 1/4 and to 1/8. If the initial sound volume setting is other than 1, the sound volume attenuates from that value in 1/2 units, stopping at 1/8. 3) Setting Sound Volume Voice volume can be changed in four steps if voice is played overlapping in channel synthesis. The sound volume is set at I1 and I0 pins. Table 6.6 shows the relationship between I1, I0 pins and sound volume settings. Table 6.6 Volume Attenuation Setting
I1 0 0 1 1 I0 0 1 0 1 Volume Attenuation No attenuation (sound volume is same as voice data) -6 dB attenuation (sound volume is 1/2 of voice data) -12 dB attenuation (sound volume is 1/4 of voice data) -18 dB attenuation (sound volume is 1/8 of voice data)
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Semiconductor 7. ADDRESS DATA
MSM6650 Family
If a phrase is input at I6 to I0 by address data, and if ST pulse is then applied, voice playback starts. Figure 7.1 shows voice start timing. Figure 7.2 and 7.3 show timing when an address, other than a phrase, is input.
I6 - I0 (I) CMD ( I ) "H" ST ( I ) BUSY (O) NAR (O) AOUT (O) Oscillation Startup Voice End User Phrase
Figure 7.1 Voice Startup Timing
I6 - I0 (I) CMD ( I ) "H" ST ( I ) BUSY (O) NAR (O) AOUT (O) Oscillation Startup
Invalid phrase address
Figure 7.2 Timing when Address, Other than a Phrase, is Input in Standby Status
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Semiconductor
MSM6650 Family
I6 - I0 (I) CMD ( I ) "H" ST ( I ) NAR (O) "H" BUSY (O) AOUT (O) 1/2 VDD
Invalid phrase address
Figure 7.3 Timing when Address, Other than a Phrase, is Input when AOUT is 1/2 VDD 8. STOP CODE When I6 to I0 are set to "0000000" during voice playback and a ST signal is input, playback stops and AOUT becomes 1/2 VDD. STOP code becomes valid at the leading edge of ST (common to parallel and serial inputs). Use the STOP code only when the BUSY pin is "L" level. The STOP code cannot be used in states of standby mode. Note: 1. If the STOP code is input while BUSY is at the "H" level or in standby state (i.e. when AOUT is GND), BUSY goes to the "L" level for approximately 400 ms. 2. If the next data is input within 80 ms after the STOP code is input while BUSY is at the "H" level or in standby state (i.e. when AOUT is GND), BUSY and NAR are kept in "L" state and do not return to "H". 3. If the next data is input within 40s after the STOP code is input while voice is being played, NAR is kept in "L" state and does not return to "H". 4. When the phrase address is input during a standby mode and the STOP code is input during standby transition, NAR cannot go back to a "H". Figure 8.1 indicates the timing.
User Phrase or silence code I6 - I0 ST tBSS AOUT Parameter STOP input time Symbol tBSS Condition During pop noise occurance Min. 80 Unit ms "0000000"
Figure 8.1 STOP Code Input Timing 87/124
Semiconductor Figure 8.2 shows STOP code input timing.
MSM6650 Family
I6 - I0 (I) CMD ( I ) ST ( I ) BUSY(O) NAR (O) AOUT (O) "H"
"0000000" tSS
User Phrase
(Note)
1/2 VDD Voice Stop
Note: tSS is also applied for serial input. Figure 8.2 STOP Code Input Timing (at Parallel Input)
The STOP code is a function not to initialize the internal, but to stop a voice. To initialize the internal register, use the RESET pin.
User Phrase I6/SD (I) I5/SI (I) tSS ST (I) BUSY (O) NAR (O) AOUT (O) Voice Stop
Figure 8.3 STOP Code Input Timing (at Serial Input)
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Semiconductor 9. SAMPLING FREQUENCY
MSM6650 Family
Sampling frequencies can be selected for each phrase address of the internal ROM. For channel mixing, when channels 1 and 2 are played back at the same time, the channel 1 sampling frequency has priority. When channel 2 is played back by itself (channel 1 is not used) it can be played at a sampling frequency different from channel 1 but only for the first phrase played back by channel 2. After the first phrase playback of channel 2 the second (and all other) phrases will be played back at the channel 1 sample rate. The following 8 frequencies can be selected when creating voice data. 4.0 kHz, 5.3 kHz, 6.4 kHz, 8.0 kHz, 10.6 kHz, 12.8 kHz, 16.0 kHz, 32.0 kHz 10. VOICE PLAYBACK TIME Table 10.1 shows the internal ROM configuration. The actual voice data ROM area is different from the indicated ROM capacity. The voice data management area as shown in Table 10.1 is about 6 Kbits, and the edit ROM area includes 16 Kbits. Table 10.1 ROM Configuration
Voice Data Management Area Editing ROM Area Voice Data Area Disabled Area
Use the following formula as a guide to compute voice playback time. Playback Time = (ROM Capacity - 16 -6 ) 1024 255/256 / Data Rate (kbps) For example, if data was created at a 4.0 kHz sampling using MSM6652 (288-Kbit internal ROM), the playback time is (288 - 16 - 6) 1024 255/256 / 16 (kbps) = 16.9 (sec.)
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Semiconductor 11. CHANNEL STATUS The BUSY and NAR pins output status signals.
MSM6650 Family
The BUSY and NAR pins output status signals. The BUSY pin outputs a "H" level when the power is turned on and a "L" level when either Channel 1 or Channel 2 is playing. The NAR (Next Address Request) pin outputs the channel 1 and 2 input status. The CH pin allows the user to see the status of Channel 1 and 2 (not Channel 1 or Channel 2) regardless of the CH pin logic level. This is because both channels are logically ANDed so their status cannot be determined independently through use of the CH pin. Consequently, if the NAR status of Channel 1 is read using the CH pin after playback has been completed, the status level of channel 2 cannot be accurately determined (e.g., "H" or "L"). The NAR pin outputs the channel 1 and 2 input status signal (Next Address Request). When this pin is at the "H" level, the ST pulse can be input. The channel status is switched by the CH pin. If the CH pin is at the "H" level, the status signal of channel 1 is output, and if CH is "L" level, the status of channel 2 is output. 12. PLAYBACK METHOD The MSM6650 has 3 playback methods: ADPCM, PCM and melody play. 12.1 ADPCM Method With the ADPCM (Adaptive Differential Pulse Code Modulation) method, basic quantization width D is adaptively changed for each sampling, and is encoded to 4-bit data. Conversion to ADPCM data can be accomplished by the AR761 or AR762 development tool. The ADPCM method is used for voice, music, and sound effects. It is considered the best compromise between high quality reproduction and memory usage. 12.2 PCM Method The PCM method of the MSM6650 uses an 8-bit straight binary format. Of the three methods, PCM is the best suited for accurate reproduction of sound effects or waveforms which are pulse shaped or change rapidly (such as high frequency pure tone sine waves). 12.3 Melody Playback Method composed by using these tools. Therefore, unique sound can be created.
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Semiconductor 12.4 Data Rate of Each Method
MSM6650 Family
The data rate shows the degree of data compression and the data amount to synthesize for 1 second. The data rate is determined by the relationship between the sampling frequency and the data format (in number of bits per sample). The following formula is used. Data Rate (kbps) = Sampling Frequency (kHz) Data format (in number of bits per sample) The data rate of the three methods are compared below when the sampling frequency is 6.4 kHz. 1) ADPCM Method Data Rate (kbps) = 6.4 (kHz) 4 (bits) = 25.6 (kbps) 2) PCM Method Data Rate (kbps) = 6.4 (kHz) 8 (bits) = 51.2 (kbps) 3) Melody Playback Method With the melody playback method, the data rate changes depend on the tempo or the kind of note ( ) used. The formula does not determine the data rate changes. The average data rate is 8 kbps. The data rate of the melody playback method is calculated as follows: Data rate = number of notes per second data amount per note [kbits] For example, to obtain data rate from the following conditions, fS = 6.4 kHz Number of notes per second = 1 Time [seconds] taken for each thirty-second note = 0.083 sec (Tempo = 90) first, obtain the data amount per note with the following expression: Data amount per note [kbits] = data amount per thirty-second note [bits per note] 2
= Time taken for each thirty-second
note [sec] fS [Hz] 8 [bits] 2 = 0.083 6400 8 2 8.5 [kbits] Therefore, when the number of notes per second is 1, the data rate is approximately 8.5 kbps.
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Semiconductor 12.5 Channel Synthesis Combinations for Each Playback Method Melody and BEEP tone playback is in channel 1 only. Table 12.1 Channel Synthesis Combinations
Channel 2 Channel 1 VOICE (ADPCM) 0 dB -6 to -18 dB 0 dB MELODY -6 to -18 dB 0 dB PCM -6 to -18 dB BEEP TONE SILENCE * * * * * VOICE (ADPCM) 0 dB * * * * -6 to -18 dB * MELODY 0 dB * * * * * * * * * PCM -6 to -18 dB *
MSM6650 Family
BEEP TONE
SILENCE

*
In the case of channel synthesis, verify the voice quality with the MSM6650 evaluation board. The combination of channel 1 and 2 can sometimes cause chipping if either of the channels is recorded at a level which is too high.
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Semiconductor 13. STANDBY CONVERSION
MSM6650 Family
If standby conversion YES is selected by command option, the IC enters standby status and stops all operations if the next phrase does not start up within 0.2 sec after playback ends. If restarted it takes about 100 ms until voice starts, since a pop noise countermeasure circuit operates. If standby conversion NO is selected by command option, the IC does not enter standby status, even if voice ends, and the output of AOUT becomes about 1/2 VDD. Current is flowing since oscillation is operating. If started up voice starts in about 350 ms. If standby conversion NO is selected, it is necessary to input a RESET pulse to enter standby status. If a RESET pulse is input, a pop noise is generated since the AOUT output level instantaneously becomes GND level.
I6-I0 CMD ST NAR BUSY AOUT "H"
Figure 13.1 ST Pulse Input Timing during Standby Conversion As shown in Figure 13.1, when ST pulse is input during standby conversion after voice ends, the IC exits from standby status, and the output of AOUT goes 1/2 VDD. When the output reaches 1/2 VDD, voice synthesis starts. 14. VOICE OUTPUT For the voice output pin, a command option can select whether the DA converter output is directly output or output through an internal low-pass filter. Table 14.1 shows output level of AOUT pin. Table 14.1 Output Level of AOUT Pin
Regeneration method
Condition DA converter output
LPF output
Lowest level 0 approx. 0.15 VDD approx. 0.25 VDD approx. 0.25 VDD approx. 0.25 VDD
Center level approx. 0.5 VDD approx. 0.5 VDD approx. 0.5 VDD approx. 0.5 VDD approx. 0.5 VDD
Highest level approx. VDD approx. 0.95 VDD approx. 0.75 VDD approx. 0.75 VDD approx. 0.75 VDD
ADPCM PCM Melody BEEP Tone
-- -- --
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Semiconductor 14.1 D/A Converter Output Wave Form
MSM6650 Family
The output amplitude from the D/A converter becomes a step wave form synchronizing the sampling frequency at a maximum 4095/4096 VDD. If D/A output is selected, it is recommended to externally attach a low-pass filter. Since the output impedance of a D/A converter changes between 15 kW to 35 kW, determine the filter constant so that this resistance change does not affect the cutoff frequency of the low-pass filter. 14.2 Low-Pass Filter Output The low-pass filter consists of switched capacitors. The attenuation characteristic of the MSM6650 family device low-pass filter is -40 dB/oct. The cutoff frequency changes depending on the sampling frequency. The cutoff frequency is 0.4 time as low as the sampling frequency. Table 14.2 shows the relationship between sampling frequency and cutoff frequency.
[dB] 20 10 0 -10 -20 -30 -40 -50 -60 -70 -80 100 1k 10k [Hz]
Figure 14.1 LPF Frequency Characteristies (fS = 8.0 kHz) Table 14.2 Cutoff Frequencies of Low-Pass Filter
Sampling Frequency (fSAM) (kHz) 4.0 5.3 6.4 8.0 10.6 12.8 16.0 32.0 Cutoff Frequency (fCUT) (kHz) approx. 1.8 approx. 2.6 approx. 2.6 approx. 3.2 approx. 4.2 approx. 5.1 approx. 6.4 approx. 12.8
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Semiconductor 15. LOW-PASS FILTER POP NOISE
MSM6650 Family
Each device of the MSM6650 family contains a "pop" noise killer circuit. However, a low-pass filter selected may cause "pop" noise as the filter output's circled portions of the figure 15.1 change by approx. 0.7 V abruptly.
Standby conversion time
Standby conversion time
Figure 15.1 Pop Noise of Low-Pass Filter "Pop" noise can be reduced by connecting a diode at the AOUT output (as shown Figure 15.2).
AOUT
Figure 15.2 Pop Noise Killer Circuit
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Semiconductor 16. CERAMIC OSCILLATION Figure 16.1 shows an external circuit diagram using a ceramic oscillator.
MSM6650 Family
XT
XT
C1
C2
Figure 16.1 External Circuit Diagram Figures 16.2 and 16.3 show external circuit diagrams using a ceramic oscillator, CSA4.09 MGU and CST4.09MGWU made by Murata MFG. Co., Ltd.
XT
XT
XT
XT
30 pF
30 pF
Internal Capacitor
Figure 16.2 CSA4.09MGU
Figure 16.3 CST4.09MGWU
Figure 16.4 shows an extend circuit diagram using a ceramic oscillator, PBRC4.00MSA/MKS/MWS made by Kyocera Corp. When using an oscillator, 4.00 MHz, playback speed is approximately 2% slower than AR761 and AR762 analysis tools and demonstration board.
XT
XT
33 pF
33 pF
Figure 16.4 PRBC4.00MSA/MKS/MWS
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Semiconductor 17. POWER SUPPLY (for MSM6650)
MSM6650 Family
The MSM6650 should be powered from a single power source to the analog section and digital section separately, as shown below.
+5 V
DVDD
AVDD
MSM6650
DGND AGND
The following power connections are not permitted.
Analog supply Digital supply DVDD AVDD
Power supply DVDD AVDD
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Semiconductor
The figure 18.1 shows an external ROM driving timing during playback at fOSC = 4.096 MHz and fS = 8.0 kHz.
Tables 18.1 and 18.2 show fS data and playback method data, respectively.
18. EXTERNAL ROM DRIVING TIMING (for MSM6650)
ST (I) NAR (O) CE (O) 4 ms D0 - D7 (I) 2 ms 4 ms 4 ms 4 ms 4 ms 4 ms 4 ms about 75 ms (*1) 125 ms (*1) 125 ms (*1) 125 ms (*1) 125 ms (*1) 125 ms (*1)(*2) 250 ms tCED
Fixed to "00"
Address & fS data & playback method data
Hereafter, control word & ADPCM data Control word ADPCM data Control word ADPCM data 1 byte 255 bytes 1 byte 255 bytes
Don't care except fS data & playback method data
All data are created using voice analysis edit tools AR76-202 and AR203.
MSM6650 Family
*1 Changes depending on fS. *2 Hereafter, CE, D7-D0 are input or output at intervals of 250 ms or 125 ms.
Figure 18.1 External ROM Driving Timing 98/124
Semiconductor Table 18.1 fSAM Data
O2 0 0 0 0 1 1 1 1 O1 0 0 1 1 0 0 1 1 O0 0 1 0 1 0 1 0 1
Sampling frequency (kHz)
MSM6650 Family
8.0 10.7 12.8 32.0 4.0 5.3 6.4 16.0
Table 18.2 Playback Method Data
O7 0 0 1 O6 0 1 0 Playback method Playback by ADPCM Playback by PCM Playback by melody
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Semiconductor
MSM6650 Family
APPLICATION CIRCUITS
(MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx)
P1.0 P1.1 P1.2
I6/SD I5/SI ST RESET NAR
VDD MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56 CH CMD
MSM83C154
P2.0 P3.0
PORT0 PORT1 AOUT I4 I1 I0
XT
AMP
RESET
XT
GND
Application Circuit in Serial Input Interface Mode
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Semiconductor
MSM6650 Family
(MSM6652/53/54/55/56-xxx, MSM6652A/53A/54A/55A/56A/58A-xxx, MSM66P54/P56-xx)
P2.0 P3.1 P2.2 P2.1 P3.0
CH CMD ST RESET NAR XT
MSM6652/53/54/55/56 MSM6652A/53A/54A/55A/56A/58A MSM66P54/P56
P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
I6 I5 I4 I3 I2 I1 I0
VDD
MSM83C154
RESET XT GND
AOUT
AMP
Application circuit in Parallel Input Interface Mode
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Semiconductor
(MSM6650)
1B
2G
74HC139 1Y3 1Y2 1Y1 1Y0
1A 1G
Application Circuit in Microcontroller Interface Mode Using Four 1-Mbit EPROMs (Serial Input Interface) 102/124
DVDD
AVDD
AOUT P2.0 P1.0 P1.1 P1.2 P3.0 RESET I6/SD I5/SI ST NAR MSM6650 MSM83C154 RESET
CE RA18 RA17 RA16
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
MSM27C101
MSM27C101
MSM27C101
MSM27C101
A16
A16
A16
A16
CH CMD TEST1 TEST2 CPU SERIAL RCS I4
RA0 D7
A0 O7
A0 O7
A0 O7
A0 O7
D0 XT XT
O0
O0
O0
O0
I1 I0 DGND AGND
MSM6650 Family
CE
GND
CE
GND
CE
GND
CE
GND
Semiconductor
(MSM6650)
1B
2G
74HC139 1Y3 1Y2 1Y1 1Y0
1A
Application Circuit in Microcontroller Interface Mode Using Four 1-Mbit EPROMs (Parallel Input Interface) 103/124
1G
DVDD
AVDD
P2.0 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P3.0 P2.1 P2.0 P3.1 P1.0
AOUT RESET I6/SD I5/SI I4 I3 I2 I1 I0 CH ST CMD NAR
CE RA18 RA17 RA16
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
VPP OE
VDD
RESET TEST1 TEST2 CPU RCS SERIAL D0 XT XT O0 O0 O0 O0
MSM83C154
MSM27C101
MSM27C101
MSM27C101
MSM27C101
A16
A16
A16
A16
DGND AGND
MSM6650
RA0 D7 A0 O7 CE
A0 O7
A0 O7
A0 O7
MSM6650 Family
GND
CE
GND
CE
GND
CE
GND
Semiconductor
MSM6650 Family
EDIT ROM
EDIT ROM
The role of edit ROM is to link phrases and build sentences, which makes an external microcontroller unnecessary. The conventional MSM6375 family could not link phrases and synthesis channels in standalone mode, but the MSM6650 family can using the edit ROM. For example: The phrase "Today's weather is...." can be used to illustrate the differences between the MSM6375 family and MSM6650. With the MSM6375 family (in stand-alone operation), individual data must be stored as a phrase in ROM (see Table1) then for playback each phrase must be addressed individually. Example: "Today's weather is sunny", and "Today's weather is rainy". On the other hand, the MSM6650 family has edit ROM functions which eliminate the need for an external microcontroller to provide the continuous timing necessary for voice concatenation, as with the MSM6375 family. This means that individual phrases or words which are stored in phrase ROM can be concatenated in the edit ROM and assigned a single address according to their content. This feature allows for efficient use of memory for phrase storage in ROM. Table 2 shows phrases/words stored in ROM and their addresses, Table 3 shows how you can combine the phrase/word addresses (up to a maximum of 8) in the edit ROM to achieve fully concatenated phrases. Conventionally data must be repeatedly stored to phrase ROM to vocalize "Today's weather is....", but overlapped data is not required as shown in Table 2 by using edit ROM functions. Table 1 Conventional Phrase ROM Configuration
Address [HEX] 01 02 03 7F
Phrase Today's weather is sunny. Today's weather is rainy. Today's weather is sunny becoming cloudy, some areas are rainy.
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Semiconductor Table 2 Phrase ROM Configuration
Address [HEX] 01 02 03 10 11 12 13 20 21 22 7F Phrase Today's weather is sunny cloudy rainy snowy occasional becoming some areas are
MSM6650 Family
Table 3 Edit ROM Configuration
Address [HEX] 01 02 03 7F Edit Content [Max. 8 Phrases] [01][02][10][03] [01][02][12][03] [01][02][10][21][11][22][13][03]
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Semiconductor
MSM6650 Family
The edit ROM makes channel synthesis possible, a feature previously not available in standalone mode with the MSM6375 family. With edit ROM commands, phrase linking, channel synthesis and "BEEP" tone or "silence" can be set. A maximum of 8 phrases (16 bytes) per phrase address can be set using the edit ROM feature. Table 4 shows the edit ROM configuration. Table 4 Edit ROM Configuration
Edit Address ROM 01 02 03 Edit Data ROM 1 Phrase* Command 1 Phrase Address 2 Phrase Command 2 Phrase Address 3 Phrase Command 7E 7F 3 Phrase Address 4 Phrase Command 4 Phrase Address 5 Phrase Command 5 Phrase Address 6 Phrase Command 6 Phrase Address 7 Phrase Command 7 Phrase Address 8 Phrase Command 8 Phrase Address 7F Phrase ROM Phrase Address [HEX] 01 02 03 04 Phrase Today's weather is sunny
*
The word "phrase" as used here includes any of the following: voice, music, BEEP tones or silence.
Edit ROM details -- The "phrase ROM" consists of up to a maximum of 127 phrases, the "edit ROM" allows you to choose up to any 8 of the 127 phrases in the "phrase ROM". The "edit data ROM" contains both phrase address and command data. Each address in the "edit address ROM" can contain up to 8 phrases in the "edit data ROM". Therefore, each of the 127 edit ROM addresses available can represent a single phrase or up to 8 phrases (for concatenation). The phrase ROM cannot be directly accessed if the edit ROM is used.
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Semiconductor
MSM6650 Family
Figure 1 shows the flowchart when creating an edit ROM using the AR76-202 development tool.
Edit Start
1
1. Voice 2. BEEP Tone 3. Silence 2
3
Voice Control Code Set 1. Specify Channel 2. Specify Fadeout 3. Specify Repeat (1, 2, 4, infinite) 4. Specify Sound Volume (0, -6, -12, -18 dB)
BEEP Tone Code Set 1. Specify Frequency (0.5, 1.0, 1.3, 2.0 kHz) 2. Specify Sound Volume (1/8, 1/4, 1/3, 1/2)
Silence Insertion Code 1. Specify Channel Command Data Input
Specify Phrase Address
BEEP Tone Time Set
Silence Time Set
Address Data Input
NO
Edit End? YES End Code Edit
Figure 1 Edit Data ROM Flowchart
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Semiconductor 1. EDIT ROM COMMANDS Table 5 shows the commands that can be set in the edit ROM. Table 5 List of Edit ROM Commands
O7 O6 O5 O4 O3 O2 O1 O0 0 0 0 0 0 0 0 0 End code Indicates that a piece of edit data is completed. ch 0 1 0 0 0 0 0 Silence insertion code
MSM6650 Family
Command Description
Silence is inserted into the channel designated by ch. ch = "1" AE Channel 1 ch = "0" AE Channel 2 After this code is inserted, the silence time is set using bits O7 to O0. Up to 2.1 seconds can be set. 1 1 0 0 bl1 bl0 bf1 bf0 BEEP tone code
bl1 0 0 1 1 bl0 0 1 0 1 Volume bf1 0 0 1 1 bf0 0 1 0 1
Frequency (kHz)
1/8 amplitude of channel 1 1/4 amplitude of channel 1 1/3 amplitude of channel 1 1/2 amplitude of channel 1
0.5 1.0 1.3 2.0
After this code is inserted, the BEEP tone time is set by using O7 to O0. Up to 2.1 seconds can be set. ch 1 1 sm rp1 rp0 vl1 vl0 Voice control code Silence is inserted into the channel designated by ch. ch = "1" AE Channel 1 ch = "0" AE Channel 2 The voice control code sets the number of repeats and sound volume. When the number of repeats is set, sound volume smoothing can also be set.
I4 (sm) Volume smoothing during repeating 0 Disabled 1 Enabled I3(rp1) I2(rp0) Number of repeats 0 0 1 0 1 2 1 0 4 1 1 Infinite I1(vl1) I0(vl0) Attenuation 0 0 0 dB 0 1 -6 dB 1 0 -12 dB 1 1 -18 dB
Each of the edit ROM commands in Table 5 are explained below.
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Semiconductor 1.1 End Code
MSM6650 Family
The end code is used at the completion of a phrase. The MSM6650 family recognizes the end code which is necessary when the edit ROM contains only a single phrase. When the maximum number of phrases is selected (8) the end code is unnecessary. 1.2 Silence Insertion Code Silence insertion code inserts silence in the specified channel, reducing voice data.
O7 ch O6 0 O5 1 O4 0 O3 0 O2 0 O1 0 O0 0
The channel for silence insertion is specified in the command data, while the silence time is set in the address data. Command data bit O7 (CH) specifies into which channel silence will be inserted, a "1" in data bit O7 selects channel 1 while a "0" selects channel 2. Silence time is set at the address settings of phrases shown in Table 4. Minimum Silence Time .... 16.384 ms Maximum Silence Time .... 2.1 sec. The formula to set the silence time is shown below. tMU = (26 (O6) + 25 (O5) + 24 (O4) + 23 (O3) + 22 (O2) + 21 (O1) + 20 (O0)) 16.384 ms Table 6 Edit Data Example of Silence insertion Coding
O7 1st Byte 2nd Byte 3rd Byte 1 0 0 O6 0 0 0 O5 1 0 0 O4 0 1 0 O3 0 1 0 O2 0 0 0 O1 0 0 0 O0 0 0 0 Silence Insertion Code Silence Time End Code
1.3 BEEP Tone Code The BEEP tone code produces a BEEP tone from an internal circuit which is independent of the ADPCM circuitry. The sound volume and frequency of a BEEP tone is set in command data, while the playback time of a BEEP tone is set in the address data. The BEEP tone can be set only in channel 1. The sound volume is set at data bits O3, O2 and the frequency is set at data bits O1, O0.
O7 1 O6 1 O5 0 O4 0 O3 bl1 O2 bl0 O1 bf1 O0 bf0
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Semiconductor
MSM6650 Family
Tables 7 and 8 show the sound volumes and the frequencies that can be set. Table 7 Sound Volume Settings
O3 0 0 1 1 O2 0 1 0 1 Sound Volume 1/8 amplitude sound volume of channel 1 1/4 amplitude sound volume of channel 1 1/3 amplitude sound volume of channel 1 1/2 amplitude sound volume of shannel 1
Table 8 Frequency Settings
O1 0 0 1 1 O0 0 1 0 1 Frequency 0.5 kHz 1.0 kHz 1.3 kHz 2.0 kHz
The BEEP tone time is set in the phrase address setting of the edit data ROM shown in Table 4. Minimum BEEP Tone Time ....... 16.384 ms Maximum BEEP Tone Time ...... 2.1 sec. The formula to set a BEEP Tone time is shown below. tBE = (26 (O6) + 25 (O5) + 24 (O4) + 23 (O3) + 22 (O2) + 21 (O1) + 20 (O0)) 16.384 ms Table 9 Edit Data Example of BEEP Tone Coding
O7 1st Byte 2nd Byte 3rd Byte 1 0 0 O6 1 0 0 O5 0 0 0 O4 0 1 0 O3 1 1 0 O2 1 0 0 O1 0 0 0 O0 1 0 0 BEEP Tone Code BEEP Tone Time End Code
For example, if edit data is set as in Table 9, a 1.0 kHz BEEP tone is played back at a 1/2 amplitude sound volume in channel 1 for 393 ms. 1.4 Voice Control Code The voice control code sets repeat and sound volume.
O7 ch O6 1 O5 1 O4 sm O3 rp1 O2 rp0 O1 vl1 O0 vl0
The channel is set with data bits "O7". If bit "O7" is "H", channel 1 is selected, if "L" channel 2 is set.The voice control condition of each channel is set using bits O0-O4.
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Semiconductor (1) Setting the Number of Repeats
MSM6650 Family
The number of repeats is set with data bits O3 and O2, and can be selected from 4 types: 1, 2, 4 and infinite. If infinite is selected, repeat can be stopped by switching to another phrase. Table 10 shows the relationship between O3, O2 and the number of repeats. Table 10 Number of Repeats Settings
O3 0 0 1 1 O2 0 1 0 1 Number of Repeats 1 2 4 Infinite
(2) Sound Volume Smoothing During Repeat If data bit "O4" is set to a "1", sound volume during repeat is attenuated from 1 to 1/2, 1/4 and 1/8. This smoothing, however, is effective only when 2, 4 or infinite is selected for the repeat setting. If infinite is selected, voice is played, remaining at 1/8 sound volume after attenuating from 1 to 1/2, 1/4 and 1/8. If the initial sound volume setting is other than 1, the sound volume attenuates from that value in 1/2 units, stopping at 1/8. (3) Setting Sound Volume Voice volume can be changed in 4 steps if voice playback overlaps during channel mixing. The sound volume is set with data bits O1 and O0. Table 11 shows the corresponding data and attenuation values. Table 11 Volume Attenuation Setting
O1 0 0 1 1 O0 0 1 0 1 Volume Attenuation No attenuation (sound volume is same as voice data) -6 dB attenuation (sound volume is 1/2 of voice data) -12 dB attenuaiton (sound volume is 1/4 of voice data) -18 dB attenuaiton (sound volume is 1/8 of voice data)
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Semiconductor 2. PCM PLAYBACK USING THE EDIT ROM
MSM6650 Family
For PCM playback, edit data is set together with the voice control data. Items which can be set in the voice control code include (channel, sound volume smoothing during repeat, number of repeats, and sound volume). 3. MELODY PLAYBACK USING THE EDIT ROM For melody playback, edit data is set together with the voice control data. Channels however cannot be set. Channel 1 is fixed. Channel 2 mixing of melodies is not possible. 4. RANDOM PLAYBACK USING THE EDIT ROM
If the RND pin is used during random playback, the 1st edit phrase (which consists of an edit data ROM sequence up to 8 phrases/16 bytes) is played and the random playback of the 2nd edit phrase then starts random play continuously. Random play requires the channel setting for the 1st and 2nd edit phrases to be the same. Random play cannot be used during channel 2 play or echo play without the use of the silence insertion technique shown in figure 10 item (2). Figure 2 item (1) shows the overlapping of the 2nd edit phrase in channel 1 with the echo playback of channel 2. Item (2) shows how silence is inserted after the 1st edit phrase in channel 1 to avoid overlapping of the 2nd edit phrase with channel 2 playback.
1st Edit Phrase Channel 1 (1) Channel 2 Silence "Today's" 1st Edit Phrase Channel 1 (2) Channel 2 Silence "Today's" "Today's" Silence 2nd Edit Phrase "weather" "Today's" 2nd Edit Phrase "weather"
Figure 2 Example of Random Vocalization Timing
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Semiconductor 5. CHANNEL 2 MIXING FUNCTION IN THE EDIT ROM
MSM6650 Family
This function overlaps 2 phrases. By using edit ROM, it is easy to echo a phrase (echo play) and to a phrase with BGM (background music, in channel 2). 5.1 Echo Playback Echo playback delays and overlaps the phrase played in channel 1 at -6 dB attenuation (1/2 amplitude of channel 1) in channel 2.
ECHO PLAYBACK OF A SINGLE PHRASE
Using address [02] of the phrase ROM, "weather", an example is shown with echo of a single phrase. Table 12 Edit Data Example of Echo Playback of a Single Phrase
O7 O6 O5 O4 O3 O2 O1 O0 1st Byte 2nd Byte 3rd Byte 4th Byte 5th Byte 6th Byte 7th Byte 1 0 0 0 0 0 0 1 0 0 0 1 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 0 0 1 0 0 Voice Control Code (CH1 select, repeat, -6 dB attenuation) Phrase Address (02H "weather") Silence Insertion Code (CH2 select) Silence Time (98.3 ms) Voice Control Code (CH2 select, repeat, -12 dB attenuaiton) Phrase Address (02H "weather") End Code
If edit data is set as in Table 12, "weather" is played in channel 1, and is overlapped during playback from channel 2 at -6 dB attenuated sound volume 98.3 ms after the start of channel 1 play. When two phrases overlap set the attenuation of the voice control command with attention to sound volume to prevent clipping. Be aware that the silence time is an element that influences the echo quality. Set the silence time so that the desired echo is created.
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Semiconductor
MSM6650 Family
When using echo play set the number of repeats of the voice control command to 1. If 2, 4 or infinite is set, timing becomes as shown in Figure 3.
Channel 1 Channel 2
"Weather" Silence "Weather"
(1) Number of Repeats: 1
Channel 1 Channel 2
"Weather"
"Weather" Silence "Weather" "Weather"
(2) Number of Repeats: 2
Channel 1 Channel 2
"Weather"
"Weather""
"Weather""
"Weather"" Silence "Weather"" "Weather""
(3) Number of Repeats: 4
Channel 1 Channel 2 "Weather" "Weather" "Weather" Channel 1 has infinite playback Channel 2 does not play
(4) Number of Repeats: infinite Figure 3 Echo Playback Timing Using Repeated Playback The echo playback timing, during repeated play which is assigned with the voice control command for an edit data phrase, is explained below.
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Semiconductor (1) When the number of repeats is set to 1
MSM6650 Family
When the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 1st phrase ends. If the channel of the next phrase is different (channel 2), then channel synthesis (playback of channels 1 and 2) begins at the start of playback. (2) When the number of repeats is set to 2 When the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 2nd phrase ends. If the channel of the next phrase is different (channel 2), then channel synthesis at the start of the second phrase playback. Echo does not occur under these conditions because channels 1 and 2 are played simultaneously. A silence insertion code must be applied to channel 2 for echo to occur, playback in channel 2 is then delayed with respect to channel 1 which causes echo (see Figure 3). The amount of echo depends on the duration of the silence in channel 2. (3) When the number of repeats is set to 4 When the same channel is selected for playback of the next phrase, playback of the next phrase starts after playback of the 4th phrase ends. If the channel of the next phrase is different (channel 2), then channel synthesis (playback of channels 1 and 2) begins at the start of the 4th phrase playback. Echo does not occur under these conditions because channels 1 and 2 are played simultaneously. A silence insertion code must be applied to channel 2 for echo to occur, playback in channel 2 is then delayed with respect to channel 1 which causes echo (see Figure 3). The amount of echo depends on the duration of the silence in channel 2. (4) When the number of repeats is set to infinite The next phrase becomes invalid and is not played regardless of the channel specification (see Figure 3 (4)).
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Semiconductor
MSM6650 Family
ECHO PLAYBACK OF MULTIPLE PHRASES
A maximum of eight phrases (16 bytes) can be set to the edit data ROM. Up to three phrases can be set for echo play with 16 bytes. The phrase ROM should be set so that the number of phrases does not exceed four. Using "Today's", "weather" and "is" of the phrase ROM in Table 2 as an example, Table 13 shows echo playback of three phrases. Figure 4 shows the playback timing. Table 13 Edit Data Example - Three Phrase Echo Playback
O7 O6 O5 O4 O3 O2 O1 O0 1st Byte 2nd Byte 3rd Byte 4th Byte 5th Byte 6th Byte 7th Byte 8th Byte 9th Byte 10th Byte 11th Byte 12th Byte 13th Byte 14th Byte 15th Byte 16th Byte 1 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 1 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 1 0 0 1 0 1 1 1 1 0 0 0 1 1 0 0 0 1 0 0 0 1 1 Voice Control Code (CH1 select, repeat once, -6 dB attenuation) Phrase Address (01H "Today's") Silence Insertion Code (CH2 select) Silence Time (98.3 ms) Voice Control Code (CH2 select, repeat once, -12 dB attenuation) Phrase Address (01H "Today's") Voice Control Code (CH1 select, repeat once, -6 dB attenuation) Phrase Address (02H "weather") Voice Control Code (CH2 select, repeat once, -12 dB attenuation) Phrase Address (02H "weather") Voice Control Code (CH1 select, repeat once, -6 dB attenuation) Phrase Address (10H "is") Voice Control Code (CH2 select repeat once, -12 dB attenuation) Phrase Address (10H "is") Voice Control Code (CH1 select, repeat once, -6 dB attenuation) Phrase Address (03H "sunny")
Channel 1 Channel 2
"Today's" Silence
"weather" "Today's"
"is" "weather"
"sunny" "is"
Figure 4 Playback Timing of Three Phrases with Echo
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Semiconductor
MSM6650 Family
For the echo playback of multiple phrases, the sampling frequency of each phrase must be the same. If a phrase with a different sampling frequency is mixed, the voice of channel 2(ECHO) will be played fast or slow because the sampling frequency of channel has priority. Figure 5 shows the timing.
fS = 6.4 kHz Channel 1 Channel 2 "Today's" Silence "Today's" Fast Playback fS = 8 kHz "weather" "weather" Slow Playback fS = 6.4 kHz "is" "is"
Figure 5 Echo Playback Timing with Different Sampling Frequencies
ECHO PLAYBACK OF A SINGLE PHRASE WITHIN A PHRASE STRING
Table14 shows an edit data example to apply echo to "is" in the four phrases of "Today's", "weather", "is" and "sunny". Table 14 Edit Data Example of a Single Phrase within a Phrase String
O7 O6 O5 O4 O3 O2 O1 O0 1st Byte 2nd Byte 3rd Byte 4th Byte 5th Byte 6th Byte 7th Byte 8th Byte 9th Byte 10th Byte 11th Byte 12th Byte 13th Byte 1 0 0 0 1 0 1 0 0 0 1 0 0 1 0 0 1 1 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 1 0 0 1 0 Voice Control Code (CH1 select, repeat once, no attenuation) Phrase Address (01H "Today's") Silence Insertion Code (CH2 select) Silence Time (1.59 sec) Voice Control Code (CH1 select, repeat once, no attenuation) Phrase Address (02H "weather") Voice Control Code (CH1 select, repeat once, no attenuation) Phrase Address (10H "is") Voice Control Code (CH2 select, repeat once, -6 dB attenuation) Phrase Address (10H "is") Voice Control Code (CH1 select, repeat once, no attenuation) Phrase Address (03H "sunny") End Code
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Semiconductor
MSM6650 Family
Channel 1 Channel 2
"Today's"
"weather" Silence 1.5 sec 0.09 sec
"is" "is"
"sunny"
Figure 6 Playback Timing Using Table 14 Edit Data As shown by the timing in Figure 6, "is" is echoed by setting the silence time to delay playback of channel 2 echo. While channel 1 plays four consecutive phrases, the silence time has been set so that channel 2 play is delayed until the selected phrase in channel 1 can be echoed. If the silence time exceeds 2.1 sec, it is necessary to add a silence insertion setting to 2 bytes of the edit data. A maximum of 6 phrases are possible if the silence insertion setting is 2 bytes. 5.2 Two-Channel Playback Two-channel play uses PCM, memory and ADPCM methods. Channel mixing is possible with all combinations except melody play/melody play (in channel 2). Melody play is in channel 1 only. The sampling frequency of phrases which overlap must be the same. Figures 7 to 10 show 2 channel playback timing.
1st Phrase Channel 1 Channel 2 "Today's" 2nd Phrase Melody Tone "weather" 3rd Phrase "is" 4th Phrase "sunny" 5th Phrase
Figure 7
Timing of Four Phrase Channel Mixing with a Melody Tone as BGM (Background Music)
1st Phrase 4th Phrase Melody Tone "is" 5th Phrase "sunny" 6th Phrase
Channel 1 Channel 2
Melody Tone "Today's" 2nd Phrase "weather" 3rd Phrase
Figure 8 Timing of Four Phrase Channel Mixing with a Melody Tone for 1st and 4th Phrases as BGM (Background Music)
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Semiconductor
1st Phrase Channel 1 Channel 2 PCM Tone (B) PCM Tone (A) PCM Tone (B) PCM Tone (B) PCM Tone (B)
MSM6650 Family
2nd Phrase
Figure 9 Channel Mixing between PCM Main Melody Tone (A) and PCM Rhythm Tone (B) with 4 Repeats
1st Phrase Channel 1 Channel 2 PCM Tone (A) PCM Tone (C) PCM Tone (C) 3rd Phrase PCM Tone (B) PCM Tone (D) PCM Tone (D)
2nd Phrase
4th Phrase
Figure 10 Channel Synthesis between PCM Main Melody Tone (A) (B) and PCM Rhythm Tone (C) (D) with 2 Repeats
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Semiconductor
MSM6650 Family
PACKAGE DIMENSIONS
(Unit : mm)
DIP18-P-300-2.54
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.30 TYP.
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Semiconductor
MSM6650 Family
(Unit : mm)
SOP24-P-430-1.27-K
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 0.58 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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Semiconductor
MSM6650 Family
(Unit : mm)
DIP20-P-300-2.54-W1
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.50 TYP.
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Semiconductor
MSM6650 Family
(Unit : mm)
QFP64-P-1420-1.00-BK
Mirror finish
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more 1.25 TYP.
Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
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Semiconductor
MSM6650 Family
(Unit : mm)
SDIP64-P-750-1.78
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin Cu alloy Solder plating 5 mm or more 8.70 TYP.
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